diff options
| author | Simon Glass | 2012-10-17 13:24:47 +0000 |
|---|---|---|
| committer | Tom Warren | 2012-11-19 08:15:35 -0700 |
| commit | beca1fdeff1a3826148330e2a40297594a710a40 (patch) | |
| tree | b52083111866afbeaa8da80280f0e1bb2a29dd5e | |
| parent | b34449611025837f315485c7bf54bf5b7ae85d06 (diff) | |
tegra: fdt: Add pwm binding and node
This binding will apparently soon be in linux-next. Bring it in now
since we need to do something, and may as well try to target what
Linux will have.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
| -rw-r--r-- | arch/arm/dts/tegra20.dtsi | 7 | ||||
| -rw-r--r-- | doc/device-tree-bindings/pwm/tegra20-pwm.txt | 18 |
2 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index d936b1e7e6a..3221bc9fa24 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -211,4 +211,11 @@ compatible = "nvidia,tegra20-nand"; reg = <0x70008000 0x100>; }; + + pwm: pwm@7000a000 { + compatible = "nvidia,tegra20-pwm"; + reg = <0x7000a000 0x100>; + #pwm-cells = <2>; + }; + }; diff --git a/doc/device-tree-bindings/pwm/tegra20-pwm.txt b/doc/device-tree-bindings/pwm/tegra20-pwm.txt new file mode 100644 index 00000000000..01438ecd662 --- /dev/null +++ b/doc/device-tree-bindings/pwm/tegra20-pwm.txt @@ -0,0 +1,18 @@ +Tegra SoC PWFM controller + +Required properties: +- compatible: should be one of: + - "nvidia,tegra20-pwm" + - "nvidia,tegra30-pwm" +- reg: physical base address and length of the controller's registers +- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The + first cell specifies the per-chip index of the PWM to use and the second + cell is the period in nanoseconds. + +Example: + + pwm: pwm@7000a000 { + compatible = "nvidia,tegra20-pwm"; + reg = <0x7000a000 0x100>; + #pwm-cells = <2>; + }; |