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authorTom Rini2019-07-02 08:18:19 -0400
committerTom Rini2019-07-02 08:18:19 -0400
commitca4491f2d2af93d8b77c48c5d272d88094fc06eb (patch)
treeb9b490d970c909e9b7cffcc857eca3b6ffbed3da
parent8c2d42d526574a6d972d7711660b652d2aeba7e1 (diff)
parent665ebcadd69b8d3ebce946709e23f0df0bee7b56 (diff)
Merge tag 'rockchip-for-v2019.07-rc5-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- fix for atf bl31_image_info pointer - fix for rockpro64 vdd_log init - fix for tinker-rk3288 SPL size too big
-rw-r--r--arch/arm/dts/rk3288-tinker-u-boot.dtsi54
-rw-r--r--arch/arm/dts/rk3288-tinker.dts19
-rw-r--r--arch/arm/dts/rk3288-u-boot.dtsi36
-rw-r--r--arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi2
-rw-r--r--arch/arm/dts/rk3288-vyasa-u-boot.dtsi2
-rw-r--r--arch/arm/dts/rk3288.dtsi8
-rw-r--r--arch/arm/dts/rk3399-rockpro64-u-boot.dtsi4
-rw-r--r--arch/arm/mach-rockchip/Kconfig18
-rw-r--r--arch/arm/mach-rockchip/rk3288/Kconfig15
-rw-r--r--common/spl/spl_atf.c1
-rw-r--r--configs/tinker-rk3288_defconfig13
-rw-r--r--include/configs/tinker_rk3288.h1
12 files changed, 124 insertions, 49 deletions
diff --git a/arch/arm/dts/rk3288-tinker-u-boot.dtsi b/arch/arm/dts/rk3288-tinker-u-boot.dtsi
new file mode 100644
index 00000000000..2efb309d6bd
--- /dev/null
+++ b/arch/arm/dts/rk3288-tinker-u-boot.dtsi
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include "rk3288-u-boot.dtsi"
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+ u-boot,dm-pre-reloc;
+};
+
+&emmc {
+ u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+ u-boot,dm-pre-reloc;
+};
+
+&gpio8 {
+ u-boot,dm-pre-reloc;
+};
+
+&pcfg_pull_none_drv_8ma {
+ u-boot,dm-spl;
+};
+
+&pcfg_pull_up_drv_8ma {
+ u-boot,dm-spl;
+};
+
+&sdmmc_bus4 {
+ u-boot,dm-spl;
+};
+
+&sdmmc_clk {
+ u-boot,dm-spl;
+};
+
+&sdmmc_cmd {
+ u-boot,dm-spl;
+};
+
+&sdmmc_pwr {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3288-tinker.dts b/arch/arm/dts/rk3288-tinker.dts
index 3edd21cc2f4..94c3afe8604 100644
--- a/arch/arm/dts/rk3288-tinker.dts
+++ b/arch/arm/dts/rk3288-tinker.dts
@@ -28,8 +28,6 @@
&pinctrl {
- u-boot,dm-pre-reloc;
-
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -42,7 +40,6 @@
};
&uart2 {
- u-boot,dm-pre-reloc;
reg-shift = <2>;
};
@@ -51,22 +48,6 @@
status = "okay";
};
-&sdmmc {
- u-boot,dm-pre-reloc;
-};
-
-&emmc {
- u-boot,dm-pre-reloc;
-};
-
-&gpio3 {
- u-boot,dm-pre-reloc;
-};
-
-&gpio8 {
- u-boot,dm-pre-reloc;
-};
-
&i2c2 {
m24c08@50 {
compatible = "at,24c08", "i2c-eeprom";
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
new file mode 100644
index 00000000000..4cf75c75044
--- /dev/null
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd
+ */
+
+&dmc {
+ u-boot,dm-pre-reloc;
+};
+
+&pmu {
+ u-boot,dm-pre-reloc;
+};
+
+&sgrf {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&vopb {
+ u-boot,dm-pre-reloc;
+};
+
+&vopl {
+ u-boot,dm-pre-reloc;
+};
+
+&noc {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
index 22ba3490f28..eccc0693688 100644
--- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright 2015 Google, Inc
*/
+#include "rk3288-u-boot.dtsi"
+
&dmc {
rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
diff --git a/arch/arm/dts/rk3288-vyasa-u-boot.dtsi b/arch/arm/dts/rk3288-vyasa-u-boot.dtsi
index 379b1e31890..7730d172288 100644
--- a/arch/arm/dts/rk3288-vyasa-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-vyasa-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com>
*/
+#include "rk3288-u-boot.dtsi"
+
&dmc {
rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 487d22c9b01..866fc082152 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -468,7 +468,6 @@
};
dmc: dmc@ff610000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-dmc", "syscon";
rockchip,cru = <&cru>;
rockchip,grf = <&grf>;
@@ -584,13 +583,11 @@
};
pmu: power-management@ff730000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-pmu", "syscon";
reg = <0xff730000 0x100>;
};
sgrf: syscon@ff740000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-sgrf", "syscon";
reg = <0xff740000 0x1000>;
};
@@ -599,7 +596,6 @@
compatible = "rockchip,rk3288-cru";
reg = <0xff760000 0x1000>;
rockchip,grf = <&grf>;
- u-boot,dm-pre-reloc;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
@@ -615,7 +611,6 @@
};
grf: syscon@ff770000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-grf", "syscon";
reg = <0xff770000 0x1000>;
};
@@ -660,7 +655,6 @@
};
vopb: vop@ff930000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-vop";
reg = <0xff930000 0x19c>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -715,7 +709,6 @@
iommus = <&vopl_mmu>;
power-domains = <&power RK3288_PD_VIO>;
status = "disabled";
- u-boot,dm-pre-reloc;
vopl_out: port {
#address-cells = <1>;
#size-cells = <0>;
@@ -911,7 +904,6 @@
};
noc: syscon@ffac0000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-noc", "syscon";
reg = <0xffac0000 0x2000>;
};
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
index 7bddc3acdbb..50b0ca0df54 100644
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
@@ -4,3 +4,7 @@
*/
#include "rk3399-u-boot.dtsi"
+
+&vdd_log {
+ regulator-init-microvolt = <950000>;
+};
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 1624b084b97..1090d21879c 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -87,6 +87,21 @@ config ROCKCHIP_RK3288
select SPL_BOARD_INIT if SPL
select SUPPORT_SPL
select SPL
+ select SUPPORT_TPL
+ imply TPL_BOOTROM_SUPPORT
+ imply TPL_CLK
+ imply TPL_DM
+ imply TPL_DRIVERS_MISC_SUPPORT
+ imply TPL_LIBCOMMON_SUPPORT
+ imply TPL_LIBGENERIC_SUPPORT
+ imply TPL_NEEDS_SEPARATE_TEXT_BASE
+ imply TPL_NEEDS_SEPARATE_STACK
+ imply TPL_OF_CONTROL
+ imply TPL_OF_PLATDATA
+ imply TPL_RAM
+ imply TPL_REGMAP
+ imply TPL_SERIAL_SUPPORT
+ imply TPL_SYSCON
imply USB_FUNCTION_ROCKUSB
imply CMD_ROCKUSB
help
@@ -104,6 +119,9 @@ config TPL_TEXT_BASE
config TPL_MAX_SIZE
default 32768
+config TPL_STACK
+ default 0xff718000
+
endif
config ROCKCHIP_RK3328
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 50680ce606b..c5dcd061cfd 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -99,21 +99,7 @@ config TARGET_VYASA_RK3288
bool "Vyasa-RK3288"
select BOARD_LATE_INIT
select ROCKCHIP_BROM_HELPER
- select SUPPORT_TPL
select TPL
- select TPL_BOOTROM_SUPPORT
- select TPL_CLK
- select TPL_DM
- select TPL_DRIVERS_MISC_SUPPORT
- select TPL_LIBCOMMON_SUPPORT
- select TPL_LIBGENERIC_SUPPORT
- select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
- select TPL_OF_CONTROL
- select TPL_OF_PLATDATA
- select TPL_RAM
- select TPL_REGMAP
- select TPL_SERIAL_SUPPORT
- select TPL_SYSCON
help
Vyasa is a RK3288-based development board with 2 USB ports,
HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It
@@ -132,6 +118,7 @@ config TARGET_ROCK2
config TARGET_TINKER_RK3288
bool "Tinker-RK3288"
select BOARD_LATE_INIT
+ select TPL
help
Tinker is a RK3288-based development board with 2 USB ports, HDMI,
micro-SD card, audio, Gigabit Ethernet. It also includes on-board
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index cddab6a7358..4715f9d3719 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -45,6 +45,7 @@ static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry)
SET_PARAM_HEAD(bl2_to_bl31_params, ATF_PARAM_BL31, ATF_VERSION_1, 0);
/* Fill BL31 related information */
+ bl2_to_bl31_params->bl31_image_info = &bl31_params_mem.bl31_image_info;
SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info,
ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 27a5fc0dfb0..482ee7d555b 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -1,13 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL_SIZE_LIMIT=30720
-CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_SPL_SIZE_LIMIT=307200
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
@@ -17,9 +16,7 @@ CONFIG_CONSOLE_MUX=y
CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_TEXT_BASE=0xff704000
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_TEXT_BASE=0
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -37,7 +34,7 @@ CONFIG_CMD_REGULATOR=y
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h
index 5adae68c91b..32057b3dbb3 100644
--- a/include/configs/tinker_rk3288.h
+++ b/include/configs/tinker_rk3288.h
@@ -18,5 +18,6 @@
func(DHCP, dchp, na)
#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_SYS_MONITOR_LEN (600 * 1024)
#endif