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authorAlexey Brodkin2017-04-11 18:24:25 +0300
committerAlexey Brodkin2017-06-29 19:34:10 +0300
commitcf628f772ef2faa9d39563dd42bd2fadf2b194f9 (patch)
tree832077c67c4a35280dc160151852c24acfeca0ec
parent08546df976b79b1694af3ff12b26baf2931f371a (diff)
arc: arcv1: Disable master/slave check
ARCompact cores are not supposed to be used in SMP designs (this doesn't stop people from creation of heterogeneous chips, for an example keep reading) so there's no point in checking ARCNUM and halting somebody if we build for ARC700. Moreover on AXS101 board we have ARC770 in the ASIC together with other ARC cores and ARC770 happens to be the last node in JTAG chain with ARCNUM = 4. And existing check halts the one and only core we want keep running. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
-rw-r--r--arch/arc/lib/start.S4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S
index b2ba7683097..95d64f9d437 100644
--- a/arch/arc/lib/start.S
+++ b/arch/arc/lib/start.S
@@ -10,6 +10,9 @@
#include <asm/arcregs.h>
ENTRY(_start)
+; ARCompact devices are not supposed to be SMP so master/slave check
+; makes no sense.
+#ifdef CONFIG_ISA_ARCV2
; Non-masters will be halted immediately, they might be kicked later
; by platform code right before passing control to the Linux kernel
; in bootm.c:boot_jump_linux().
@@ -25,6 +28,7 @@ ENTRY(_start)
nop
.Lmaster_proceed:
+#endif
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]