diff options
author | Stefan Roese | 2016-01-19 14:24:12 +0100 |
---|---|---|
committer | Bin Meng | 2016-01-28 13:53:30 +0800 |
commit | d521197d69c0fe85afdd75c537783adf95905ede (patch) | |
tree | 4c8148cffb387a826e69f58d27e307611025df61 | |
parent | 85056932f2bad4b6749d42c983d2219ae70fa741 (diff) |
x86: baytrail: Add option to disable the internal UART to setup_early_uart()
This patch adds a parameter to the function setup_early_uart() to either
enable or disable the internal BayTrail legacy UART. Since the name
setup_early_uart() does not match its functionality any more, lets
rename it to setup_internal_uart() as well in this patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r-- | arch/x86/cpu/baytrail/early_uart.c | 10 | ||||
-rw-r--r-- | arch/x86/include/asm/u-boot-x86.h | 2 | ||||
-rw-r--r-- | arch/x86/lib/fsp/fsp_support.c | 2 | ||||
-rw-r--r-- | doc/README.x86 | 2 |
4 files changed, 10 insertions, 6 deletions
diff --git a/arch/x86/cpu/baytrail/early_uart.c b/arch/x86/cpu/baytrail/early_uart.c index b64a3a90db4..471d592b49f 100644 --- a/arch/x86/cpu/baytrail/early_uart.c +++ b/arch/x86/cpu/baytrail/early_uart.c @@ -59,11 +59,15 @@ static void x86_pci_write_config32(int dev, unsigned int where, u32 value) } /* This can be called after memory-mapped PCI is working */ -int setup_early_uart(void) +int setup_internal_uart(int enable) { - /* Enable the legacy UART hardware. */ + /* Enable or disable the legacy UART hardware */ x86_pci_write_config32(PCI_DEV_CONFIG(0, LPC_DEV, LPC_FUNC), UART_CONT, - 1); + enable); + + /* All done for the disable part, so just return */ + if (!enable) + return 0; /* * Set up the pads to the UART function. This allows the signals to diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 9c143caf670..031740b708a 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -45,7 +45,7 @@ void dram_init_banksize(void); int default_print_cpuinfo(void); /* Set up a UART which can be used with printch(), printhex8(), etc. */ -int setup_early_uart(void); +int setup_internal_uart(int enable); void setup_pcat_compatibility(void); diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c index 875c96a8f19..29fa06098d1 100644 --- a/arch/x86/lib/fsp/fsp_support.c +++ b/arch/x86/lib/fsp/fsp_support.c @@ -111,7 +111,7 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) #endif #ifdef CONFIG_DEBUG_UART - setup_early_uart(); + setup_internal_uart(1); #endif fsp_hdr = find_fsp_header(); diff --git a/doc/README.x86 b/doc/README.x86 index 36aaef011de..6d9cb10edc8 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -706,7 +706,7 @@ the board, then you can use post_code() calls from C or assembler to monitor boot progress. This can be good for debugging. If not, you can try to get serial working as early as possible. The early -debug serial port may be useful here. See setup_early_uart() for an example. +debug serial port may be useful here. See setup_internal_uart() for an example. During the U-Boot porting, one of the important steps is to write correct PIRQ routing information in the board device tree. Without it, device drivers in the |