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authorStefan Herbrechtsmeier2014-09-16 17:51:09 +0200
committerTom Rini2014-10-23 11:53:01 -0400
commitf5c30c1b1c69b235f28d34f8ee1670b2028152ff (patch)
treebf9f0800809acad56cf2ec64a4304de96dda7a34
parent4ed914a2430775973730562c2c880318536b9586 (diff)
omap3: overo: Add usb host support
Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
-rw-r--r--board/overo/overo.c34
-rw-r--r--include/configs/omap3_overo.h8
2 files changed, 42 insertions, 0 deletions
diff --git a/board/overo/overo.c b/board/overo/overo.c
index 488246bcc57..66146eead5f 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -25,6 +25,11 @@
#include <asm/mach-types.h>
#include "overo.h"
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/ehci-omap.h>
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
#define TWL4030_I2C_BUS 0
@@ -474,3 +479,32 @@ int board_mmc_init(bd_t *bis)
return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif
+
+#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+#define GUMSTIX_GPIO_USBH_CPEN 168
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+ /* Enable USB power */
+ if (!gpio_request(GUMSTIX_GPIO_USBH_CPEN, "usbh_cpen"))
+ gpio_direction_output(GUMSTIX_GPIO_USBH_CPEN, 1);
+
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+}
+
+int ehci_hcd_stop(void)
+{
+ /* Disable USB power */
+ gpio_set_value(GUMSTIX_GPIO_USBH_CPEN, 0);
+ gpio_free(GUMSTIX_GPIO_USBH_CPEN);
+
+ return omap_ehci_hcd_stop();
+}
+
+#endif /* CONFIG_USB_EHCI */
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index d042eea1b04..c58636a5417 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -35,6 +35,13 @@
/* TWL4030 LED */
#define CONFIG_TWL4030_LED
+/* USB EHCI */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
/* Initialize GPIOs by default */
#define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
#define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
@@ -44,6 +51,7 @@
/* commands to include */
#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_USB
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
#undef CONFIG_CMD_NFS /* NFS support */