diff options
| author | Tom Rini | 2020-02-05 07:19:52 -0500 |
|---|---|---|
| committer | Tom Rini | 2020-02-05 07:19:52 -0500 |
| commit | f5cc89a82a9990ba9805ff5800c0872b891533ce (patch) | |
| tree | e5e5ab0ea18616c364b03f96ec98778fec824281 | |
| parent | c95215a6ca1cc7bb53cc634159e222abc06fddff (diff) | |
| parent | d9618e980430f3f7b84dfd5bb3004285ed47e5ba (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes on ls1012a, ls1021a, ls1028ardb platforms Integrate fspi for
ls1028a, add DM-I2C support, update secure boot header offset
75 files changed, 885 insertions, 149 deletions
@@ -147,7 +147,9 @@ config SYS_MALLOC_F_LEN default 0x1000 if AM33XX default 0x2800 if SANDBOX default 0x2000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_MX7 || \ - ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5) + ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5 || \ + ARCH_LS1012A || ARCH_LS1021A || ARCH_LS1043A || \ + ARCH_LS1046A) default 0x400 help Before relocation, memory is very limited on many platforms. Still, diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index e2b92f0eabb..275c66d9929 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -16,8 +16,8 @@ config ARCH_LS1012A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC - select SYS_I2C_MXC_I2C1 - select SYS_I2C_MXC_I2C2 + select SYS_I2C_MXC_I2C1 if !DM_I2C + select SYS_I2C_MXC_I2C2 if !DM_I2C imply PANIC_HANG config ARCH_LS1028A diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 8a6eecab22e..accad6e8ae7 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -72,9 +72,11 @@ void board_init_f(ulong dummy) preloader_console_init(); spl_set_bd(); +#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SPL_I2C_SUPPORT i2c_init_all(); #endif +#endif #ifdef CONFIG_VID init_func_vid(); #endif diff --git a/arch/arm/dts/fsl-ls1028a-qds.dts b/arch/arm/dts/fsl-ls1028a-qds.dts index 5d143ba0770..3fd37beedf4 100644 --- a/arch/arm/dts/fsl-ls1028a-qds.dts +++ b/arch/arm/dts/fsl-ls1028a-qds.dts @@ -13,6 +13,10 @@ / { model = "NXP Layerscape 1028a QDS Board"; compatible = "fsl,ls1028a-qds", "fsl,ls1028a"; + aliases { + spi0 = &fspi; + }; + }; &dspi0 { @@ -36,6 +40,18 @@ }; +&fspi { + status = "okay"; + + mt35xu02g0: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + }; +}; + &i2c0 { status = "okay"; u-boot,dm-pre-reloc; diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts index 3d5e8ade211..a8f40855b65 100644 --- a/arch/arm/dts/fsl-ls1028a-rdb.dts +++ b/arch/arm/dts/fsl-ls1028a-rdb.dts @@ -13,6 +13,9 @@ / { model = "NXP Layerscape 1028a RDB Board"; compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; + aliases { + spi0 = &fspi; + }; }; &dspi0 { @@ -36,6 +39,18 @@ mmc-hs200-1_8v; }; +&fspi { + status = "okay"; + + mt35xu02g0: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + }; +}; + &i2c0 { status = "okay"; u-boot,dm-pre-reloc; diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index 43a154e8e75..5365bfb1a8e 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -6,6 +6,8 @@ * */ +#include <dt-bindings/interrupt-controller/arm-gic.h> + / { compatible = "fsl,ls1028a"; interrupt-parent = <&gic>; @@ -38,25 +40,32 @@ <0x0 0x06040000 0 0x40000>; #interrupt-cells = <3>; interrupt-controller; - interrupts = <1 9 0x4>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) | + IRQ_TYPE_LEVEL_LOW)>; }; timer { compatible = "arm,armv8-timer"; - interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */ - <1 14 0x8>, /* Physical Non-Secure PPI, active-low */ - <1 11 0x8>, /* Virtual PPI, active-low */ - <1 10 0x8>; /* Hypervisor PPI, active-low */ + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | + IRQ_TYPE_LEVEL_LOW)>; }; - fspi: flexspi@20C0000 { - compatible = "nxp,dn-fspi"; + fspi: flexspi@20c0000 { + compatible = "nxp,lx2160a-fspi"; #address-cells = <1>; #size-cells = <0>; - reg = <0x0 0x20C0000 0x0 0x10000>, - <0x0 0x20000000 0x0 0x10000000>; /*64MB flash*/ - reg-names = "FSPI", "FSPI-memory"; - num-cs = <1>; + reg = <0x0 0x20c0000 0x0 0x10000>, + <0x0 0x20000000 0x0 0x10000000>; + reg-names = "fspi_base", "fspi_mmap"; + clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clock-names = "fspi_en", "fspi"; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -64,7 +73,7 @@ device_type = "serial"; compatible = "fsl,ns16550", "ns16550a"; reg = <0x0 0x21c0500 0x0 0x100>; - interrupts = <0 32 0x1>; /* edge triggered */ + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -72,7 +81,7 @@ device_type = "serial"; compatible = "fsl,ns16550", "ns16550a"; reg = <0x0 0x21c0600 0x0 0x100>; - interrupts = <0 32 0x1>; /* edge triggered */ + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -148,7 +157,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2000000 0x0 0x10000>; - interrupts = <0 34 0x4>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; clock-names = "i2c"; clocks = <&clockgen 4 0>; status = "disabled"; @@ -159,7 +168,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2010000 0x0 0x10000>; - interrupts = <0 34 0x4>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; clock-names = "i2c"; clocks = <&clockgen 4 0>; status = "disabled"; @@ -170,7 +179,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2020000 0x0 0x10000>; - interrupts = <0 35 0x4>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; clock-names = "i2c"; clocks = <&clockgen 4 0>; status = "disabled"; @@ -181,7 +190,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2030000 0x0 0x10000>; - interrupts = <0 35 0x4>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; clock-names = "i2c"; clocks = <&clockgen 4 0>; status = "disabled"; @@ -192,7 +201,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2040000 0x0 0x10000>; - interrupts = <0 74 0x4>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; clock-names = "i2c"; clocks = <&clockgen 4 0>; status = "disabled"; @@ -203,7 +212,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2050000 0x0 0x10000>; - interrupts = <0 74 0x4>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; clock-names = "i2c"; clocks = <&clockgen 4 0>; status = "disabled"; @@ -214,7 +223,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2060000 0x0 0x10000>; - interrupts = <0 75 0x4>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; clock-names = "i2c"; clocks = <&clockgen 4 0>; status = "disabled"; @@ -225,7 +234,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2070000 0x0 0x10000>; - interrupts = <0 75 0x4>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; clock-names = "i2c"; clocks = <&clockgen 4 0>; status = "disabled"; @@ -234,7 +243,7 @@ usb1: usb3@3100000 { compatible = "fsl,layerscape-dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; - interrupts = <0 80 0x4>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; dr_mode = "host"; status = "disabled"; }; @@ -242,7 +251,7 @@ usb2: usb3@3110000 { compatible = "fsl,layerscape-dwc3"; reg = <0x0 0x3110000 0x0 0x10000>; - interrupts = <0 81 0x4>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; dr_mode = "host"; status = "disabled"; }; @@ -252,7 +261,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2100000 0x0 0x10000>; - interrupts = <0 26 0x4>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clock-names = "dspi"; clocks = <&clockgen 4 0>; num-cs = <5>; @@ -265,7 +274,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2110000 0x0 0x10000>; - interrupts = <0 26 0x4>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clock-names = "dspi"; clocks = <&clockgen 4 0>; num-cs = <5>; @@ -278,7 +287,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2120000 0x0 0x10000>; - interrupts = <0 26 0x4>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clock-names = "dspi"; clocks = <&clockgen 4 0>; num-cs = <5>; @@ -289,7 +298,7 @@ esdhc0: esdhc@2140000 { compatible = "fsl,esdhc"; reg = <0x0 0x2140000 0x0 0x10000>; - interrupts = <0 28 0x4>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; big-endian; bus-width = <4>; status = "disabled"; @@ -298,7 +307,7 @@ esdhc1: esdhc@2150000 { compatible = "fsl,esdhc"; reg = <0x0 0x2150000 0x0 0x10000>; - interrupts = <0 63 0x4>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; big-endian; non-removable; bus-width = <4>; @@ -310,7 +319,7 @@ reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */ 0x7 0x100520 0x0 0x4>; /* ecc sata addr*/ reg-names = "sata-base", "ecc-addr"; - interrupts = <0 133 4>; + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts index 46a9239c253..e542c6992ab 100644 --- a/arch/arm/dts/fsl-lx2160a-rdb.dts +++ b/arch/arm/dts/fsl-lx2160a-rdb.dts @@ -16,7 +16,9 @@ / { model = "NXP Layerscape LX2160ARDB Board"; compatible = "fsl,lx2160ardb", "fsl,lx2160a"; - + aliases { + spi0 = &fspi; + }; }; &esdhc0 { @@ -28,6 +30,26 @@ mmc-hs200-1_8v; }; +&fspi { + status = "okay"; + + mt35xu512aba0: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + }; + + mt35xu512aba1: flash@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <1>; + }; +}; + &i2c0 { status = "okay"; u-boot,dm-pre-reloc; diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi index 9d018cad1c3..42ce4379ece 100644 --- a/arch/arm/dts/fsl-lx2160a.dtsi +++ b/arch/arm/dts/fsl-lx2160a.dtsi @@ -6,6 +6,8 @@ * */ +#include <dt-bindings/interrupt-controller/arm-gic.h> + / { compatible = "fsl,lx2160a"; interrupt-parent = <&gic>; @@ -49,6 +51,19 @@ <1 10 0x8>; /* Hypervisor PPI, active-low */ }; + fspi: flexspi@20c0000 { + compatible = "nxp,lx2160a-fspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x20c0000 0x0 0x10000>, + <0x0 0x20000000 0x0 0x10000000>; + reg-names = "fspi_base", "fspi_mmap"; + clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clock-names = "fspi_en", "fspi"; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + i2c0: i2c@2000000 { compatible = "fsl,vf610-i2c"; #address-cells = <1>; diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index acb7ea9a3eb..39ffc18e29e 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -4,6 +4,7 @@ !defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_LX2160A) && \ !defined(CONFIG_ARCH_LS1028A) && !defined(CONFIG_ARCH_LS2080A) && \ !defined(CONFIG_ARCH_LS1088A) && !defined(CONFIG_ARCH_ASPEED) && \ + !defined(CONFIG_ARCH_LS1012A) && \ !defined(CONFIG_ARCH_U8500) #include <asm/arch/gpio.h> #endif diff --git a/board/freescale/common/dcu_sii9022a.c b/board/freescale/common/dcu_sii9022a.c index 3bf71abf553..832ae258f14 100644 --- a/board/freescale/common/dcu_sii9022a.c +++ b/board/freescale/common/dcu_sii9022a.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2019 NXP */ #include <asm/io.h> @@ -63,7 +64,101 @@ int dcu_set_dvi_encoder(struct fb_videomode *videomode) u8 temp; u16 temp1, temp2; u32 temp3; +#ifdef CONFIG_DM_I2C + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM, + CONFIG_SYS_I2C_DVI_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + CONFIG_SYS_I2C_DVI_BUS_NUM); + return ret; + } + /* Enable TPI transmitter mode */ + temp = TPI_TRANS_MODE_ENABLE; + dm_i2c_write(dev, TPI_TRANS_MODE_REG, &temp, 1); + + /* Enter into D0 state, full operation */ + dm_i2c_read(dev, TPI_PWR_STAT_REG, &temp, 1); + temp &= ~TPI_PWR_STAT_MASK; + temp |= TPI_PWR_STAT_D0; + dm_i2c_write(dev, TPI_PWR_STAT_REG, &temp, 1); + + /* Enable source termination */ + temp = TPI_SET_PAGE_SII9022A; + dm_i2c_write(dev, TPI_SET_PAGE_REG, &temp, 1); + temp = TPI_SET_OFFSET_SII9022A; + dm_i2c_write(dev, TPI_SET_OFFSET_REG, &temp, 1); + + dm_i2c_read(dev, TPI_RW_ACCESS_REG, &temp, 1); + temp |= TPI_RW_EN_SRC_TERMIN; + dm_i2c_write(dev, TPI_RW_ACCESS_REG, &temp, 1); + + /* Set TPI system control */ + temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE; + dm_i2c_write(dev, TPI_SYS_CTRL_REG, &temp, 1); + + /* Set pixel clock */ + temp1 = PICOS2KHZ(videomode->pixclock) / 10; + temp = (u8)(temp1 & 0xFF); + dm_i2c_write(dev, PIXEL_CLK_LSB_REG, &temp, 1); + temp = (u8)(temp1 >> 8); + dm_i2c_write(dev, PIXEL_CLK_MSB_REG, &temp, 1); + + /* Set total pixels per line */ + temp1 = videomode->hsync_len + videomode->left_margin + + videomode->xres + videomode->right_margin; + temp = (u8)(temp1 & 0xFF); + dm_i2c_write(dev, TOTAL_PIXELS_LSB_REG, &temp, 1); + temp = (u8)(temp1 >> 8); + dm_i2c_write(dev, TOTAL_PIXELS_MSB_REG, &temp, 1); + + /* Set total lines */ + temp2 = videomode->vsync_len + videomode->upper_margin + + videomode->yres + videomode->lower_margin; + temp = (u8)(temp2 & 0xFF); + dm_i2c_write(dev, TOTAL_LINES_LSB_REG, &temp, 1); + temp = (u8)(temp2 >> 8); + dm_i2c_write(dev, TOTAL_LINES_MSB_REG, &temp, 1); + + /* Set vertical frequency in Hz */ + temp3 = temp1 * temp2; + temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3; + temp1 = (u16)temp3 * 100; + temp = (u8)(temp1 & 0xFF); + dm_i2c_write(dev, VERT_FREQ_LSB_REG, &temp, 1); + temp = (u8)(temp1 >> 8); + dm_i2c_write(dev, VERT_FREQ_MSB_REG, &temp, 1); + + /* Set TPI input bus and pixel repetition data */ + temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE | + TPI_INBUS_RISING_EDGE; + dm_i2c_write(dev, TPI_INBUS_FMT_REG, &temp, 1); + + /* Set TPI AVI Input format data */ + temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO | + TPI_INPUT_CLR_RGB; + dm_i2c_write(dev, TPI_INPUT_FMT_REG, &temp, 1); + + /* Set TPI AVI Output format data */ + temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO | + TPI_OUTPUT_CLR_HDMI_RGB; + dm_i2c_write(dev, TPI_OUTPUT_FMT_REG, &temp, 1); + + /* Set TPI audio configuration write data */ + temp = TPI_AUDIO_PASS_BASIC; + dm_i2c_write(dev, TPI_AUDIO_HANDING_REG, &temp, 1); + + temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL | + TPI_AUDIO_TYPE_PCM; + dm_i2c_write(dev, TPI_AUDIO_INTF_REG, &temp, 1); + + temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K; + dm_i2c_write(dev, TPI_AUDIO_FREQ_REG, &temp, 1); +#else i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM); /* Enable TPI transmitter mode */ @@ -147,6 +242,7 @@ int dcu_set_dvi_encoder(struct fb_videomode *videomode) temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K; i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_FREQ_REG, 1, &temp, 1); +#endif return 0; } diff --git a/board/freescale/common/diu_ch7301.c b/board/freescale/common/diu_ch7301.c index 435b4a3f1ac..7f11123e6f3 100644 --- a/board/freescale/common/diu_ch7301.c +++ b/board/freescale/common/diu_ch7301.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2019 NXP * Authors: Priyanka Jain <Priyanka.Jain@freescale.com> * Wang Dongsheng <dongsheng.wang@freescale.com> * @@ -51,6 +52,85 @@ int diu_set_dvi_encoder(unsigned int pixclock) u8 temp; temp = I2C_DVI_TEST_PATTERN_VAL; +#ifdef CONFIG_DM_I2C + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM, + CONFIG_SYS_I2C_DVI_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + CONFIG_SYS_I2C_DVI_BUS_NUM); + return ret; + } + ret = dm_i2c_write(dev, I2C_DVI_TEST_PATTERN_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select proper dvi test pattern\n"); + return ret; + } + temp = I2C_DVI_INPUT_DATA_FORMAT_VAL; + ret = dm_i2c_write(dev, I2C_DVI_INPUT_DATA_FORMAT_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select dvi input data format\n"); + return ret; + } + + /* Set Sync polarity register */ + temp = I2C_DVI_SYNC_POLARITY_VAL; + ret = dm_i2c_write(dev, I2C_DVI_SYNC_POLARITY_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select dvi syc polarity\n"); + return ret; + } + + /* Set PLL registers based on pixel clock rate*/ + if (pixclock > 65000000) { + temp = I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL; + ret = dm_i2c_write(dev, I2C_DVI_PLL_CHARGE_CNTL_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select dvi pll charge_cntl\n"); + return ret; + } + temp = I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL; + ret = dm_i2c_write(dev, I2C_DVI_PLL_DIVIDER_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select dvi pll divider\n"); + return ret; + } + temp = I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL; + ret = dm_i2c_write(dev, I2C_DVI_PLL_FILTER_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select dvi pll filter\n"); + return ret; + } + } else { + temp = I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL; + ret = dm_i2c_write(dev, I2C_DVI_PLL_CHARGE_CNTL_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select dvi pll charge_cntl\n"); + return ret; + } + temp = I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL; + ret = dm_i2c_write(dev, I2C_DVI_PLL_DIVIDER_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select dvi pll divider\n"); + return ret; + } + temp = I2C_DVI_PLL_FILTER_LOW_SPEED_VAL; + ret = dm_i2c_write(dev, I2C_DVI_PLL_FILTER_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select dvi pll filter\n"); + return ret; + } + } + + temp = I2C_DVI_POWER_MGMT_VAL; + ret = dm_i2c_write(dev, I2C_DVI_POWER_MGMT_REG, &temp, 1); + if (ret) { + puts("I2C: failed to select dvi power mgmt\n"); + return ret; + } +#else ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_TEST_PATTERN_REG, 1, &temp, 1); if (ret) { @@ -128,6 +208,7 @@ int diu_set_dvi_encoder(unsigned int pixclock) puts("I2C: failed to select dvi power mgmt\n"); return ret; } +#endif udelay(500); diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c index 716c93b2c24..dd1ee90b3c7 100644 --- a/board/freescale/common/qixis.c +++ b/board/freescale/common/qixis.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2011 Freescale Semiconductor + * Copyright 2020 NXP * Author: Shengzhou Liu <Shengzhou.Liu@freescale.com> * * This file provides support for the QIXIS of some Freescale reference boards. @@ -287,7 +288,9 @@ static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const ar #ifdef QIXIS_LBMAP_EMMC QIXIS_WRITE(rst_ctl, 0x30); QIXIS_WRITE(rcfg_ctl, 0); +#ifndef NON_EXTENDED_DUTCFG set_lbmap(QIXIS_LBMAP_EMMC); +#endif set_rcw_src(QIXIS_RCW_SRC_EMMC); QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE); QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START); @@ -365,6 +368,7 @@ U_BOOT_CMD( "qixis watchdog <watchdog_period> - set the watchdog period\n" " period: 1s 2s 4s 8s 16s 32s 1min 2min 4min 8min\n" "qixis_reset dump - display the QIXIS registers\n" + "qixis_reset emmc - reset to emmc\n" "qixis_reset switch - display switch\n" ); #endif diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c index 86c72ee357e..30bf1047d53 100644 --- a/board/freescale/ls1012aqds/ls1012aqds.c +++ b/board/freescale/ls1012aqds/ls1012aqds.c @@ -107,10 +107,26 @@ int board_early_init_f(void) int misc_init_r(void) { u8 mux_sdhc_cd = 0x80; - - i2c_set_bus_num(0); + int bus_num = 0; + +#ifdef CONFIG_DM_I2C + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(bus_num, CONFIG_SYS_I2C_FPGA_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return ret; + } + dm_i2c_write(dev, 0x5a, &mux_sdhc_cd, 1); +#else + i2c_set_bus_num(bus_num); i2c_write(CONFIG_SYS_I2C_FPGA_ADDR, 0x5a, 1, &mux_sdhc_cd, 1); +#endif + return 0; } #endif diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index 51efd0fa37e..639353a94bb 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -82,8 +82,8 @@ if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select PHYLIB - imply CONFIG_PHYLIB_10G - imply CONFIG_PHY_AQUANTIA + imply PHYLIB_10G + imply PHY_AQUANTIA config SYS_LS_PFE_FW_ADDR hex "Flash address of PFE firmware" diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c index 3cc0a65cb91..5edcfcf1cea 100644 --- a/board/freescale/ls1012ardb/eth.c +++ b/board/freescale/ls1012ardb/eth.c @@ -28,12 +28,47 @@ static inline void ls1012ardb_reset_phy(void) { #ifdef CONFIG_TARGET_LS1012ARDB /* Through reset IO expander reset both RGMII and SGMII PHYs */ +#ifdef CONFIG_DM_I2C + struct udevice *dev; + int ret; + + /* + * The I2C IO-expander PCAL9555A is mouted on I2C1 bus(bus number is 0). + */ + ret = i2c_get_chip_for_busnum(0, I2C_MUX_IO2_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + 0); + return; + } + /* Config port 0 + * - config pin IOXP_RST_ETH1_B and IOXP_RST_ETH2_B + * are enabled as an output. + */ + dm_i2c_reg_write(dev, 6, __PHY_MASK); + + /* + * Set port 0 output a value to reset ETH2 interface + * - pin IOXP_RST_ETH2_B output 0b0 + */ + dm_i2c_reg_write(dev, 2, __PHY_ETH2_MASK); + mdelay(10); + dm_i2c_reg_write(dev, 2, __PHY_ETH1_MASK); + /* + * Set port 0 output a value to reset ETH1 interface + * - pin IOXP_RST_ETH1_B output 0b0 + */ + mdelay(10); + dm_i2c_reg_write(dev, 2, 0xFF); +#else i2c_reg_write(I2C_MUX_IO2_ADDR, 6, __PHY_MASK); i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH2_MASK); mdelay(10); i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH1_MASK); mdelay(10); i2c_reg_write(I2C_MUX_IO2_ADDR, 2, 0xFF); +#endif mdelay(50); #endif } diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index 0f665c7bc68..ab83ef11a09 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -34,13 +34,27 @@ int checkboard(void) { #ifdef CONFIG_TARGET_LS1012ARDB u8 in1; + int ret, bus_num = 0; puts("Board: LS1012ARDB "); /* Initialize i2c early for Serial flash bank information */ - i2c_set_bus_num(0); +#if defined(CONFIG_DM_I2C) + struct udevice *dev; - if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1) < 0) { + ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return -ENXIO; + } + ret = dm_i2c_read(dev, I2C_MUX_IO_1, &in1, 1); +#else /* Non DM I2C support - will be removed */ + i2c_set_bus_num(bus_num); + ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1); +#endif + if (ret < 0) { printf("Error reading i2c boot information!\n"); return 0; /* Don't want to hang() on this error */ } @@ -175,11 +189,25 @@ int esdhc_status_fixup(void *blob, const char *compat) bool sdhc2_en = false; u8 mux_sdhc2; u8 io = 0; + int ret, bus_num = 0; - i2c_set_bus_num(0); +#if defined(CONFIG_DM_I2C) + struct udevice *dev; + ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return -ENXIO; + } + ret = dm_i2c_read(dev, I2C_MUX_IO_1, &io, 1); +#else + i2c_set_bus_num(bus_num); /* IO1[7:3] is the field of board revision info. */ - if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1) < 0) { + ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1); +#endif + if (ret < 0) { printf("Error reading i2c boot information!\n"); return 0; } @@ -202,7 +230,12 @@ int esdhc_status_fixup(void *blob, const char *compat) * 10 - eMMC Memory * 11 - SPI */ - if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1) < 0) { +#if defined(CONFIG_DM_I2C) + ret = dm_i2c_read(dev, I2C_MUX_IO_0, &io, 1); +#else + ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1); +#endif + if (ret < 0) { printf("Error reading i2c boot information!\n"); return 0; } @@ -233,16 +266,63 @@ int ft_board_setup(void *blob, bd_t *bd) static int switch_to_bank1(void) { - u8 data; - int ret; + u8 data = 0xf4, chip_addr = 0x24, offset_addr = 0x03; + int ret, bus_num = 0; - i2c_set_bus_num(0); +#if defined(CONFIG_DM_I2C) + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(bus_num, chip_addr, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return -ENXIO; + } + /* + * -------------------------------------------------------------------- + * |bus |I2C address| Device | Notes | + * -------------------------------------------------------------------- + * |I2C1|0x24, 0x25,| IO expander (CFG,| Provides 16bits of General | + * | |0x26 | RESET, and INT/ | Purpose parallel Input/Output| + * | | | KW41GPIO) - NXP | (GPIO) expansion for the | + * | | | PCAL9555AHF | I2C bus | + * ----- -------------------------------------------------------------- + * - mount three IO expander(PCAL9555AHF) on I2C1 + * + * PCAL9555A device address + * slave address + * -------------------------------------- + * | 0 | 1 | 0 | 0 | A2 | A1 | A0 | R/W | + * -------------------------------------- + * | fixed | hardware selectable| + * + * Output port 1(Pinter register bits = 0x03) + * + * P1_[7~0] = 0xf4 + * P1_0 <---> CFG_MUX_QSPI_S0 + * P1_1 <---> CFG_MUX_QSPI_S1 + * CFG_MUX_QSPI_S[1:0] = 0b00 + * + * QSPI chip-select demultiplexer select + * --------------------------------------------------------------------- + * CFG_MUX_QSPI_S1|CFG_MUX_QSPI_S0| Values + * --------------------------------------------------------------------- + * 0 | 0 |CS routed to SPI memory bank1(default) + * --------------------------------------------------------------------- + * 0 | 1 |CS routed to SPI memory bank2 + * --------------------------------------------------------------------- + * + */ + ret = dm_i2c_write(dev, offset_addr, &data, 1); +#else /* Non DM I2C support - will be removed */ + i2c_set_bus_num(bus_num); + ret = i2c_write(chip_addr, offset_addr, 1, &data, 1); +#endif - data = 0xf4; - ret = i2c_write(0x24, 0x3, 1, &data, 1); if (ret) { printf("i2c write error to chip : %u, addr : %u, data : %u\n", - 0x24, 0x3, data); + chip_addr, offset_addr, data); } return ret; @@ -250,25 +330,45 @@ static int switch_to_bank1(void) static int switch_to_bank2(void) { - u8 data; - int ret; + u8 data[2] = {0xfc, 0xf5}, offset_addr[2] = {0x7, 0x3}; + u8 chip_addr = 0x24; + int ret, i, bus_num = 0; - i2c_set_bus_num(0); +#if defined(CONFIG_DM_I2C) + struct udevice *dev; - data = 0xfc; - ret = i2c_write(0x24, 0x7, 1, &data, 1); + ret = i2c_get_chip_for_busnum(bus_num, chip_addr, + 1, &dev); if (ret) { - printf("i2c write error to chip : %u, addr : %u, data : %u\n", - 0x24, 0x7, data); - goto err; + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return -ENXIO; } +#else /* Non DM I2C support - will be removed */ + i2c_set_bus_num(bus_num); +#endif - data = 0xf5; - ret = i2c_write(0x24, 0x3, 1, &data, 1); - if (ret) { - printf("i2c write error to chip : %u, addr : %u, data : %u\n", - 0x24, 0x3, data); + /* + * 1th step: config port 1 + * - the port 1 pin is enabled as an output + * 2th step: output port 1 + * - P1_[7:0] output 0xf5, + * then CFG_MUX_QSPI_S[1:0] equal to 0b01, + * CS routed to SPI memory bank2 + */ + for (i = 0; i < sizeof(data); i++) { +#if defined(CONFIG_DM_I2C) + ret = dm_i2c_write(dev, offset_addr[i], &data[i], 1); +#else /* Non DM I2C support - will be removed */ + ret = i2c_write(chip_addr, offset_addr[i], 1, &data[i], 1); +#endif + if (ret) { + printf("i2c write error to chip : %u, addr : %u, data : %u\n", + chip_addr, offset_addr[i], data[i]); + goto err; + } } + err: return ret; } diff --git a/board/freescale/ls1021aqds/dcu.c b/board/freescale/ls1021aqds/dcu.c index c4eac5e3025..b648a7872bc 100644 --- a/board/freescale/ls1021aqds/dcu.c +++ b/board/freescale/ls1021aqds/dcu.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2019 NXP * * FSL DCU Framebuffer driver */ @@ -15,11 +16,23 @@ DECLARE_GLOBAL_DATA_PTR; -static int select_i2c_ch_pca9547(u8 ch) +static int select_i2c_ch_pca9547(u8 ch, int bus_num) { int ret; +#ifdef CONFIG_DM_I2C + struct udevice *dev; + ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return ret; + } + ret = dm_i2c_write(dev, 0, &ch, 1); +#else ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); +#endif if (ret) { puts("PCA: failed to select proper channel\n"); return ret; @@ -51,6 +64,28 @@ int platform_dcu_init(struct fb_info *fbinfo, u8 ch; /* Mux I2C3+I2C4 as HSYNC+VSYNC */ +#ifdef CONFIG_DM_I2C + struct udevice *dev; + + /* QIXIS device mount on I2C1 bus*/ + ret = i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_QIXIS_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + 0); + return ret; + } + ret = dm_i2c_read(dev, QIXIS_DCU_BRDCFG5, &ch, 1); + if (ret) { + printf("Error: failed to read I2C @%02x\n", + CONFIG_SYS_I2C_QIXIS_ADDR); + return ret; + } + ch &= 0x1F; + ch |= 0xA0; + ret = dm_i2c_write(dev, QIXIS_DCU_BRDCFG5, &ch, 1); + +#else ret = i2c_read(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5, 1, &ch, 1); if (ret) { @@ -62,6 +97,7 @@ int platform_dcu_init(struct fb_info *fbinfo, ch |= 0xA0; ret = i2c_write(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5, 1, &ch, 1); +#endif if (ret) { printf("Error: failed to write I2C @%02x\n", CONFIG_SYS_I2C_QIXIS_ADDR); @@ -76,10 +112,14 @@ int platform_dcu_init(struct fb_info *fbinfo, pixval = 1000000000 / dcu_fb_videomode->pixclock; pixval *= 1000; +#ifndef CONFIG_DM_I2C i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM); - select_i2c_ch_pca9547(I2C_MUX_CH_CH7301); +#endif + select_i2c_ch_pca9547(I2C_MUX_CH_CH7301, + CONFIG_SYS_I2C_DVI_BUS_NUM); diu_set_dvi_encoder(pixval); - select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); + select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, + CONFIG_SYS_I2C_DVI_BUS_NUM); } else { return 0; } diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index b7f8f1d5786..1ae822e5107 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2019 NXP */ #include <common.h> @@ -139,11 +140,23 @@ unsigned long get_board_ddr_clk(void) return 66666666; } -int select_i2c_ch_pca9547(u8 ch) +int select_i2c_ch_pca9547(u8 ch, int bus_num) { int ret; +#ifdef CONFIG_DM_I2C + struct udevice *dev; + ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return ret; + } + ret = dm_i2c_write(dev, 0, &ch, 1); +#else ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); +#endif if (ret) { puts("PCA: failed to select proper channel\n"); return ret; @@ -158,8 +171,10 @@ int dram_init(void) * When resuming from deep sleep, the I2C channel may not be * in the default channel. So, switch to the default channel * before accessing DDR SPD. + * + * PCA9547(0x77) mount on I2C1 bus */ - select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); + select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0); return fsl_initdram(); } @@ -408,7 +423,7 @@ int board_init(void) erratum_a009942_check_cpo(); #endif - select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); + select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0); #ifndef CONFIG_SYS_FSL_NO_SERDES fsl_serdes_init(); diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 497dce5f0f3..d1ff7b8ba6f 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2019 NXP */ #include <common.h> @@ -447,14 +448,37 @@ void board_init_f(ulong dummy) /* program the regulator (MC34VR500) to support deep sleep */ void ls1twr_program_regulator(void) { - unsigned int i2c_bus; u8 i2c_device_id; #define LS1TWR_I2C_BUS_MC34VR500 1 #define MC34VR500_ADDR 0x8 #define MC34VR500_DEVICEID 0x4 #define MC34VR500_DEVICEID_MASK 0x0f +#ifdef CONFIG_DM_I2C + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(LS1TWR_I2C_BUS_MC34VR500, MC34VR500_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + LS1TWR_I2C_BUS_MC34VR500); + return; + } + i2c_device_id = dm_i2c_reg_read(dev, 0x0) & + MC34VR500_DEVICEID_MASK; + if (i2c_device_id != MC34VR500_DEVICEID) { + printf("The regulator (MC34VR500) does not exist. The device does not support deep sleep.\n"); + return; + } + dm_i2c_reg_write(dev, 0x31, 0x4); + dm_i2c_reg_write(dev, 0x4d, 0x4); + dm_i2c_reg_write(dev, 0x6d, 0x38); + dm_i2c_reg_write(dev, 0x6f, 0x37); + dm_i2c_reg_write(dev, 0x71, 0x30); +#else + unsigned int i2c_bus; i2c_bus = i2c_get_bus_num(); i2c_set_bus_num(LS1TWR_I2C_BUS_MC34VR500); i2c_device_id = i2c_reg_read(MC34VR500_ADDR, 0x0) & @@ -471,6 +495,7 @@ void ls1twr_program_regulator(void) i2c_reg_write(MC34VR500_ADDR, 0x71, 0x30); i2c_set_bus_num(i2c_bus); +#endif } #endif diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 6555b5ad3a8..103b0cc6591 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -306,6 +306,8 @@ int checkboard(void) if (src == BOOT_SOURCE_SD_MMC) { puts("SD\n"); + } else if (src == BOOT_SOURCE_SD_MMC2) { + puts("eMMC\n"); } else { sw = QIXIS_READ(brdcfg[0]); sw = (sw >> QIXIS_XMAP_SHIFT) & QIXIS_XMAP_MASK; diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index be8b2e51eff..dabe2b52d55 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -52,3 +52,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 0a035a83faa..2a5713b8521 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -52,3 +52,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 7258d47dfca..e5196defac2 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -52,3 +52,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index 85f87ba238f..4b55b0c485f 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -52,3 +52,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index a3c6fe7d8f6..14fdef4ad45 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -54,3 +54,6 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index eb732a1964b..6ca5599dfa5 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -54,3 +54,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 92d85994a35..79e4de9fc00 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -55,3 +55,6 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_CMD_SETEXPR=y CONFIG_RSA_SOFTWARE_EXP=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index ca732c4b483..5f1469e6716 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -60,3 +60,6 @@ CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 1d6bcc51c44..3708f42e2fb 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -76,3 +76,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index f525544ccf2..ac9e92036c8 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -68,3 +68,6 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 656de21adbf..b1e3e51754d 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -76,3 +76,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index a2d8e9dd6de..c59d74408db 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y @@ -57,3 +58,6 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index d734e2ed6f6..8ae63ef73dc 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -33,6 +33,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40300000 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y @@ -59,3 +60,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index fa137834ff4..19a2e5bfbee 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_SETEXPR=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y @@ -57,3 +58,6 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 3f0e19d7922..b47a47d56b8 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -33,6 +33,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40500000 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y @@ -60,3 +61,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_RTC=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index c3376e106c6..8a3b79693b7 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -45,3 +45,5 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index a7a340076f1..684ae4e75f3 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -51,3 +51,5 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 70f7053ed08..fdfec314e9f 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -67,3 +67,5 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index eaa26ceee97..c0d9395f494 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -67,3 +67,5 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index c7c701de9eb..0a9438039b7 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -82,3 +82,5 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 3f990355535..6b12a4e277f 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -66,3 +66,5 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_RSA=y CONFIG_SPL_RSA=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 6fe62a713de..9c35ba954f8 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -68,3 +68,5 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index ad222eb9ef7..39b82dd022e 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -68,3 +68,5 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index e643242b14c..ac5133896d7 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -69,3 +69,5 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 2c28b9efbac..17b6e6418c6 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -81,3 +81,5 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index d8065e72422..703eeff05dc 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -81,3 +81,5 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index c30e89d959a..543f96580bd 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -57,3 +57,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 3d3d743c87a..6c73a9f4eec 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -68,3 +68,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index dbd9d0e070a..2925f37a752 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -60,3 +60,5 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_RSA=y CONFIG_SPL_RSA=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 7fcd4de2d09..cbcc491eb05 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -62,3 +62,5 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 0303d49045a..0b364dc85d1 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -63,3 +63,5 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 50b7eedcc2b..077ccef5f10 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -67,3 +67,5 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index c909f40bd13..01c541399ea 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -74,3 +74,5 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_RSA=y CONFIG_SPL_RSA=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 97e6a4747f4..abc5d873fff 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -75,3 +75,5 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 3ad24eae2f7..7cc76aa3c61 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -78,3 +78,5 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 019ecfd9b1f..d0051bb682b 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -69,6 +69,7 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y +CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 435f36446bb..7085be77fe1 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -75,6 +75,7 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y +CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 27a9ab131f8..a8288f1c2af 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -66,6 +66,7 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y +CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index eff794e2cd5..3ef5520969f 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -73,6 +73,7 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y +CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 786b5a2226b..6b7ce985b3a 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -1049,5 +1049,6 @@ U_BOOT_DRIVER(i2c_mxc) = { .probe = mxc_i2c_probe, .priv_auto_alloc_size = sizeof(struct mxc_i2c_bus), .ops = &mxc_i2c_ops, + .flags = DM_FLAG_PRE_RELOC, }; #endif diff --git a/drivers/rtc/pcf8563.c b/drivers/rtc/pcf8563.c index a839d6cc98b..84f2b231c23 100644 --- a/drivers/rtc/pcf8563.c +++ b/drivers/rtc/pcf8563.c @@ -12,9 +12,11 @@ #include <common.h> #include <command.h> +#include <dm.h> #include <rtc.h> #include <i2c.h> +#if !CONFIG_IS_ENABLED(DM_RTC) static uchar rtc_read (uchar reg); static void rtc_write (uchar reg, uchar val); @@ -115,3 +117,108 @@ static void rtc_write (uchar reg, uchar val) { i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } +#else +static int pcf8563_rtc_get(struct udevice *dev, struct rtc_time *tmp) +{ + int rel = 0; + uchar sec, min, hour, mday, wday, mon_cent, year; + + sec = dm_i2c_reg_read(dev, 0x02); + min = dm_i2c_reg_read(dev, 0x03); + hour = dm_i2c_reg_read(dev, 0x04); + mday = dm_i2c_reg_read(dev, 0x05); + wday = dm_i2c_reg_read(dev, 0x06); + mon_cent = dm_i2c_reg_read(dev, 0x07); + year = dm_i2c_reg_read(dev, 0x08); + + debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x ", + year, mon_cent, mday, wday); + debug("hr: %02x min: %02x sec: %02x\n", + hour, min, sec); + debug("Alarms: wday: %02x day: %02x hour: %02x min: %02x\n", + dm_i2c_reg_read(dev, 0x0C), + dm_i2c_reg_read(dev, 0x0B), + dm_i2c_reg_read(dev, 0x0A), + dm_i2c_reg_read(dev, 0x09)); + + if (sec & 0x80) { + puts("### Warning: RTC Low Voltage - date/time not reliable\n"); + rel = -1; + } + + tmp->tm_sec = bcd2bin(sec & 0x7F); + tmp->tm_min = bcd2bin(min & 0x7F); + tmp->tm_hour = bcd2bin(hour & 0x3F); + tmp->tm_mday = bcd2bin(mday & 0x3F); + tmp->tm_mon = bcd2bin(mon_cent & 0x1F); + tmp->tm_year = bcd2bin(year) + ((mon_cent & 0x80) ? 1900 : 2000); + tmp->tm_wday = bcd2bin(wday & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + return rel; +} + +static int pcf8563_rtc_set(struct udevice *dev, const struct rtc_time *tmp) +{ + uchar century; + + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + dm_i2c_reg_write(dev, 0x08, bin2bcd(tmp->tm_year % 100)); + + century = (tmp->tm_year >= 2000) ? 0 : 0x80; + dm_i2c_reg_write(dev, 0x07, bin2bcd(tmp->tm_mon) | century); + + dm_i2c_reg_write(dev, 0x06, bin2bcd(tmp->tm_wday)); + dm_i2c_reg_write(dev, 0x05, bin2bcd(tmp->tm_mday)); + dm_i2c_reg_write(dev, 0x04, bin2bcd(tmp->tm_hour)); + dm_i2c_reg_write(dev, 0x03, bin2bcd(tmp->tm_min)); + dm_i2c_reg_write(dev, 0x02, bin2bcd(tmp->tm_sec)); + + return 0; +} + +static int pcf8563_rtc_reset(struct udevice *dev) +{ + /* clear all control & status registers */ + dm_i2c_reg_write(dev, 0x00, 0x00); + dm_i2c_reg_write(dev, 0x01, 0x00); + dm_i2c_reg_write(dev, 0x0D, 0x00); + + /* clear Voltage Low bit */ + dm_i2c_reg_write(dev, 0x02, dm_i2c_reg_read(dev, 0x02) & 0x7F); + + /* reset all alarms */ + dm_i2c_reg_write(dev, 0x09, 0x00); + dm_i2c_reg_write(dev, 0x0A, 0x00); + dm_i2c_reg_write(dev, 0x0B, 0x00); + dm_i2c_reg_write(dev, 0x0C, 0x00); + + return 0; +} + +static const struct rtc_ops pcf8563_rtc_ops = { + .get = pcf8563_rtc_get, + .set = pcf8563_rtc_set, + .reset = pcf8563_rtc_reset, +}; + +static const struct udevice_id pcf8563_rtc_ids[] = { + { .compatible = "nxp,pcf8563" }, + { } +}; + +U_BOOT_DRIVER(rtc_pcf8563) = { + .name = "rtc-pcf8563", + .id = UCLASS_RTC, + .of_match = pcf8563_rtc_ids, + .ops = &pcf8563_rtc_ops, +}; +#endif diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 2579e2fb37e..e9baa2a8b66 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -66,7 +66,12 @@ CONFIG_SYS_SCSI_MAX_LUN) /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index b419c46829e..0738b243c43 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * Copyright 2020 NXP * Copyright 2016 Freescale Semiconductor, Inc. */ @@ -64,7 +65,7 @@ "initrd_high=0xffffffffffffffff\0" \ "fdt_addr=0x00f00000\0" \ "kernel_addr=0x01000000\0" \ - "kernelheader_addr=0x800000\0" \ + "kernelheader_addr=0x600000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ "fdtheader_addr_r=0x80100000\0" \ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 0b2d331b9b9..1d218aa703d 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2019 NXP */ #ifndef __CONFIG_H @@ -97,7 +98,13 @@ * I2C */ #define CONFIG_CMD_I2C + +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 8427be5adc1..8bac2d25612 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2019 NXP */ #ifndef __CONFIG_H @@ -331,7 +332,12 @@ unsigned long get_board_ddr_clk(void); /* * I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index bdb4273cf5c..984df6249f9 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 - * Copyright 2016-2018 NXP Semiconductors + * Copyright 2016-2019 NXP Semiconductors * Copyright 2019 Vladimir Oltean <olteanv@gmail.com> */ @@ -107,7 +107,12 @@ #define CONFIG_BAUDRATE 115200 /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 1919d1e14f9..8e2784b14bf 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2019 NXP */ #ifndef __CONFIG_H @@ -209,7 +210,12 @@ /* * I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ @@ -307,6 +313,8 @@ "kernel_size=0x2800000\0" \ "kernel_addr_sd=0x8000\0" \ "kernel_size_sd=0x14000\0" \ + "$othbootargs\0" \ + "othbootargs=cma=64M@0x0-0xb0000000\0" \ BOOTENV \ "boot_scripts=ls1021atwr_boot.scr\0" \ "boot_script_hdr=hdr_ls1021atwr_bs.out\0" \ @@ -367,6 +375,8 @@ "kernel_size_sd=0x14000\0" \ "kernelhdr_addr_sd=0x4000\0" \ "kernelhdr_size_sd=0x10\0" \ + "$othbootargs\0" \ + "othbootargs=cma=64M@0x0-0xb0000000\0" \ BOOTENV \ "boot_scripts=ls1021atwr_boot.scr\0" \ "boot_script_hdr=hdr_ls1021atwr_bs.out\0" \ @@ -446,6 +456,7 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#undef CONFIG_DM_I2C #else #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 6543cfd868c..3944f877942 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Freescale Semiconductor - * Copyright 2019 NXP + * Copyright 2019-2020 NXP */ #ifndef __LS1046A_COMMON_H @@ -230,13 +230,13 @@ "fdt_addr_r=0x90000000\0" \ "ramdisk_addr_r=0xa0000000\0" \ "kernel_start=0x1000000\0" \ - "kernelheader_start=0x800000\0" \ + "kernelheader_start=0x600000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "kernelheader_size=0x40000\0" \ "kernel_addr_sd=0x8000\0" \ "kernel_size_sd=0x14000\0" \ - "kernelhdr_addr_sd=0x4000\0" \ + "kernelhdr_addr_sd=0x3000\0" \ "kernelhdr_size_sd=0x10\0" \ "console=ttyS0,115200\0" \ CONFIG_MTDPARTS_DEFAULT "\0" \ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index a5125c8f37f..361c72fc8c9 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017 NXP + * Copyright 2017, 2020 NXP */ #ifndef __LS1088A_QDS_H @@ -407,9 +407,9 @@ unsigned long get_board_ddr_clk(void); "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcinitcmd=sf probe 0:0;sf read 0xa0a00000 0xa00000 0x100000;" \ - "sf read 0xa0700000 0x700000 0x4000; esbc_validate 0xa0700000;" \ + "sf read 0xa0640000 0x640000 0x4000; esbc_validate 0xa0640000;" \ "sf read 0xa0e00000 0xe00000 0x100000;" \ - "sf read 0xa0740000 0x740000 0x4000;esbc_validate 0xa0740000;" \ + "sf read 0xa0680000 0x680000 0x4000;esbc_validate 0xa0680000;" \ "fsl_mc start mc 0xa0a00000 0xa0e00000\0" \ "mcmemsize=0x70000000 \0" #else /* if !(CONFIG_NXP_ESBC) */ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index d02ad083e86..b48efcc119f 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017 NXP + * Copyright 2017, 2020 NXP */ #ifndef __LS1088A_RDB_H @@ -296,19 +296,19 @@ "sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \ "sf read 0x80100000 0xE00000 0x100000;" \ "env exists secureboot && " \ - "sf read 0x80700000 0x700000 0x40000 && " \ - "sf read 0x80740000 0x740000 0x40000 && " \ - "esbc_validate 0x80700000 && " \ - "esbc_validate 0x80740000 ;" \ + "sf read 0x80640000 0x640000 0x40000 && " \ + "sf read 0x80680000 0x680000 0x40000 && " \ + "esbc_validate 0x80640000 && " \ + "esbc_validate 0x80680000 ;" \ "fsl_mc start mc 0x80000000 0x80100000\0" #define SD_MC_INIT_CMD \ "mmcinfo;mmc read 0x80000000 0x5000 0x800;" \ "mmc read 0x80100000 0x7000 0x800;" \ "env exists secureboot && " \ - "mmc read 0x80700000 0x3800 0x20 && " \ - "mmc read 0x80740000 0x3A00 0x20 && " \ - "esbc_validate 0x80700000 && " \ - "esbc_validate 0x80740000 ;" \ + "mmc read 0x80640000 0x3200 0x20 && " \ + "mmc read 0x80680000 0x3400 0x20 && " \ + "esbc_validate 0x80640000 && " \ + "esbc_validate 0x80680000 ;" \ "fsl_mc start mc 0x80000000 0x80100000\0" #else #if defined(CONFIG_QSPI_BOOT) @@ -316,10 +316,10 @@ "mcinitcmd=sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \ "sf read 0x80100000 0xE00000 0x100000;" \ "env exists secureboot && " \ - "sf read 0x80700000 0x700000 0x40000 && " \ - "sf read 0x80740000 0x740000 0x40000 && " \ - "esbc_validate 0x80700000 && " \ - "esbc_validate 0x80740000 ;" \ + "sf read 0x80640000 0x640000 0x40000 && " \ + "sf read 0x80680000 0x680000 0x40000 && " \ + "esbc_validate 0x80640000 && " \ + "esbc_validate 0x80680000 ;" \ "fsl_mc start mc 0x80000000 0x80100000\0" \ "mcmemsize=0x70000000\0" #elif defined(CONFIG_SD_BOOT) @@ -327,10 +327,10 @@ "mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \ "mmc read 0x80100000 0x7000 0x800;" \ "env exists secureboot && " \ - "mmc read 0x80700000 0x3800 0x20 && " \ - "mmc read 0x80740000 0x3A00 0x20 && " \ - "esbc_validate 0x80700000 && " \ - "esbc_validate 0x80740000 ;" \ + "mmc read 0x80640000 0x3200 0x20 && " \ + "mmc read 0x80680000 0x3400 0x20 && " \ + "esbc_validate 0x80640000 && " \ + "esbc_validate 0x80680000 ;" \ "fsl_mc start mc 0x80000000 0x80100000\0" \ "mcmemsize=0x70000000\0" #endif @@ -348,13 +348,13 @@ "fdt_addr=0x64f00000\0" \ "kernel_addr=0x1000000\0" \ "kernel_addr_sd=0x8000\0" \ - "kernelhdr_addr_sd=0x4000\0" \ + "kernelhdr_addr_sd=0x3000\0" \ "kernel_start=0x580100000\0" \ - "kernelheader_start=0x580800000\0" \ + "kernelheader_start=0x580600000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ "fdtheader_addr_r=0x80100000\0" \ - "kernelheader_addr=0x800000\0" \ + "kernelheader_addr=0x600000\0" \ "kernelheader_addr_r=0x80200000\0" \ "kernel_addr_r=0x81000000\0" \ "kernelheader_size=0x40000\0" \ @@ -417,13 +417,13 @@ "fdt_addr=0x64f00000\0" \ "kernel_addr=0x1000000\0" \ "kernel_addr_sd=0x8000\0" \ - "kernelhdr_addr_sd=0x4000\0" \ + "kernelhdr_addr_sd=0x3000\0" \ "kernel_start=0x580100000\0" \ "kernelheader_start=0x580800000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ "fdtheader_addr_r=0x80100000\0" \ - "kernelheader_addr=0x800000\0" \ + "kernelheader_addr=0x600000\0" \ "kernelheader_addr_r=0x80200000\0" \ "kernel_addr_r=0x81000000\0" \ "kernelheader_size=0x40000\0" \ @@ -480,8 +480,8 @@ #define QSPI_NOR_BOOTCOMMAND \ "sf read 0x80001000 0xd00000 0x100000;" \ "env exists mcinitcmd && env exists secureboot " \ - " && sf read 0x80780000 0x780000 0x100000 " \ - "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + " && sf read 0x806C0000 0x6C0000 0x100000 " \ + "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ "&& fsl_mc lazyapply dpl 0x80001000;" \ "run distro_bootcmd;run qspi_bootcmd;" \ "env exists secureboot && esbc_halt;" @@ -489,8 +489,8 @@ "env exists mcinitcmd && mmcinfo; " \ "mmc read 0x80001000 0x6800 0x800; " \ "env exists mcinitcmd && env exists secureboot " \ - " && mmc read 0x80780000 0x3C00 0x20 " \ - "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + " && mmc read 0x806C0000 0x3600 0x20 " \ + "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ "&& fsl_mc lazyapply dpl 0x80001000;" \ "run distro_bootcmd;run sd_bootcmd;" \ "env exists secureboot && esbc_halt;" @@ -500,8 +500,8 @@ #define CONFIG_BOOTCOMMAND \ "sf read 0x80001000 0xd00000 0x100000;" \ "env exists mcinitcmd && env exists secureboot " \ - " && sf read 0x80780000 0x780000 0x100000 " \ - "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + " && sf read 0x806C0000 0x6C0000 0x100000 " \ + "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ "&& fsl_mc lazyapply dpl 0x80001000;" \ "run distro_bootcmd;run qspi_bootcmd;" \ "env exists secureboot && esbc_halt;" @@ -512,8 +512,8 @@ "env exists mcinitcmd && mmcinfo; " \ "mmc read 0x80001000 0x6800 0x800; " \ "env exists mcinitcmd && env exists secureboot " \ - " && mmc read 0x80780000 0x3C00 0x20 " \ - "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + " && mmc read 0x806C0000 0x3600 0x20 " \ + "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ "&& fsl_mc lazyapply dpl 0x80001000;" \ "run distro_bootcmd;run sd_bootcmd;" \ "env exists secureboot && esbc_halt;" diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 9539e2a8db2..88da69f36f0 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2019 NXP + * Copyright 2017, 2019-2020 NXP * Copyright 2015 Freescale Semiconductor */ @@ -349,8 +349,8 @@ unsigned long get_board_ddr_clk(void); "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcmemsize=0x40000000\0" \ - "mcinitcmd=esbc_validate 0x580700000;" \ - "esbc_validate 0x580740000;" \ + "mcinitcmd=esbc_validate 0x580640000;" \ + "esbc_validate 0x580680000;" \ "fsl_mc start mc 0x580a00000" \ " 0x580e00000 \0" #else @@ -378,7 +378,7 @@ unsigned long get_board_ddr_clk(void); "kernel_size=0x2800000\0" \ "kernel_size_sd=0x14000\0" \ "load_addr=0xa0000000\0" \ - "kernelheader_addr=0x580800000\0" \ + "kernelheader_addr=0x580600000\0" \ "kernelheader_addr_r=0x80200000\0" \ "kernelheader_size=0x40000\0" \ "BOARD=ls2088aqds\0" \ @@ -431,7 +431,7 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_TFABOOT #define SD_BOOTCOMMAND \ "env exists mcinitcmd && env exists secureboot "\ - "&& mmcinfo && mmc read $load_addr 0x3c00 0x800 " \ + "&& mmcinfo && mmc read $load_addr 0x3600 0x800 " \ "&& esbc_validate $load_addr; " \ "env exists mcinitcmd && run mcinitcmd " \ "&& mmc read 0x80d00000 0x6800 0x800 " \ @@ -441,7 +441,7 @@ unsigned long get_board_ddr_clk(void); #define IFC_NOR_BOOTCOMMAND \ "env exists mcinitcmd && env exists secureboot "\ - "&& esbc_validate 0x580780000; env exists mcinitcmd "\ + "&& esbc_validate 0x5806C0000; env exists mcinitcmd "\ "&& fsl_mc lazyapply dpl 0x580d00000;" \ "run nor_bootcmd; " \ "env exists secureboot && esbc_halt;" diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index de14fb4ac82..c1819d22a84 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2019 NXP + * Copyright 2017, 2019-2020 NXP * Copyright 2015 Freescale Semiconductor */ @@ -323,46 +323,46 @@ unsigned long get_board_sys_clk(void); #ifdef CONFIG_TFABOOT #define QSPI_MC_INIT_CMD \ "env exists secureboot && " \ - "esbc_validate 0x20700000 && " \ - "esbc_validate 0x20740000;" \ + "esbc_validate 0x20640000 && " \ + "esbc_validate 0x20680000;" \ "fsl_mc start mc 0x20a00000 0x20e00000 \0" #define SD_MC_INIT_CMD \ "mmcinfo;mmc read 0x80a00000 0x5000 0x1200;" \ "mmc read 0x80e00000 0x7000 0x800;" \ "env exists secureboot && " \ - "mmc read 0x80700000 0x3800 0x20 && " \ - "mmc read 0x80740000 0x3A00 0x20 && " \ - "esbc_validate 0x80700000 && " \ - "esbc_validate 0x80740000 ;" \ + "mmc read 0x80640000 0x3200 0x20 && " \ + "mmc read 0x80680000 0x3400 0x20 && " \ + "esbc_validate 0x80640000 && " \ + "esbc_validate 0x80680000 ;" \ "fsl_mc start mc 0x80a00000 0x80e00000\0" #define IFC_MC_INIT_CMD \ "env exists secureboot && " \ - "esbc_validate 0x580700000 && " \ - "esbc_validate 0x580740000; " \ + "esbc_validate 0x580640000 && " \ + "esbc_validate 0x580680000; " \ "fsl_mc start mc 0x580a00000 0x580e00000 \0" #else #ifdef CONFIG_QSPI_BOOT #define MC_INIT_CMD \ "mcinitcmd=env exists secureboot && " \ - "esbc_validate 0x20700000 && " \ - "esbc_validate 0x20740000;" \ + "esbc_validate 0x20640000 && " \ + "esbc_validate 0x20680000;" \ "fsl_mc start mc 0x20a00000 0x20e00000 \0" #elif defined(CONFIG_SD_BOOT) #define MC_INIT_CMD \ "mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \ "mmc read 0x80100000 0x7000 0x800;" \ "env exists secureboot && " \ - "mmc read 0x80700000 0x3800 0x20 && " \ - "mmc read 0x80740000 0x3A00 0x20 && " \ - "esbc_validate 0x80700000 && " \ - "esbc_validate 0x80740000 ;" \ + "mmc read 0x80640000 0x3200 0x20 && " \ + "mmc read 0x80680000 0x3400 0x20 && " \ + "esbc_validate 0x80640000 && " \ + "esbc_validate 0x80680000 ;" \ "fsl_mc start mc 0x80000000 0x80100000\0" \ "mcmemsize=0x70000000\0" #else #define MC_INIT_CMD \ "mcinitcmd=env exists secureboot && " \ - "esbc_validate 0x580700000 && " \ - "esbc_validate 0x580740000; " \ + "esbc_validate 0x580640000 && " \ + "esbc_validate 0x580680000; " \ "fsl_mc start mc 0x580a00000 0x580e00000 \0" #endif #endif @@ -384,7 +384,7 @@ unsigned long get_board_sys_clk(void); "scripthdraddr=0x80080000\0" \ "fdtheader_addr_r=0x80100000\0" \ "kernelheader_addr_r=0x80200000\0" \ - "kernelheader_addr=0x580800000\0" \ + "kernelheader_addr=0x580600000\0" \ "kernel_addr_r=0x81000000\0" \ "kernelheader_size=0x40000\0" \ "fdt_addr_r=0x90000000\0" \ @@ -442,12 +442,12 @@ unsigned long get_board_sys_clk(void); "fdt_addr=0x64f00000\0" \ "kernel_addr=0x581000000\0" \ "kernel_start=0x1000000\0" \ - "kernelheader_start=0x800000\0" \ + "kernelheader_start=0x600000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ "fdtheader_addr_r=0x80100000\0" \ "kernelheader_addr_r=0x80200000\0" \ - "kernelheader_addr=0x580800000\0" \ + "kernelheader_addr=0x580600000\0" \ "kernel_addr_r=0x81000000\0" \ "kernelheader_size=0x40000\0" \ "fdt_addr_r=0x90000000\0" \ @@ -501,7 +501,7 @@ unsigned long get_board_sys_clk(void); #ifdef CONFIG_TFABOOT #define QSPI_NOR_BOOTCOMMAND \ "env exists mcinitcmd && env exists secureboot "\ - "&& esbc_validate 0x20780000; " \ + "&& esbc_validate 0x206C0000; " \ "env exists mcinitcmd && " \ "fsl_mc lazyapply dpl 0x20d00000; " \ "run distro_bootcmd;run qspi_bootcmd; " \ @@ -510,7 +510,7 @@ unsigned long get_board_sys_clk(void); /* Try to boot an on-SD kernel first, then do normal distro boot */ #define SD_BOOTCOMMAND \ "env exists mcinitcmd && env exists secureboot "\ - "&& mmcinfo && mmc read $load_addr 0x3c00 0x800 " \ + "&& mmcinfo && mmc read $load_addr 0x3600 0x800 " \ "&& esbc_validate $load_addr; " \ "env exists mcinitcmd && run mcinitcmd " \ "&& mmc read 0x80d00000 0x6800 0x800 " \ @@ -521,7 +521,7 @@ unsigned long get_board_sys_clk(void); /* Try to boot an on-NOR kernel first, then do normal distro boot */ #define IFC_NOR_BOOTCOMMAND \ "env exists mcinitcmd && env exists secureboot "\ - "&& esbc_validate 0x580780000; env exists mcinitcmd "\ + "&& esbc_validate 0x5806C0000; env exists mcinitcmd "\ "&& fsl_mc lazyapply dpl 0x580d00000;" \ "run distro_bootcmd;run nor_bootcmd; " \ "env exists secureboot && esbc_halt;" @@ -531,7 +531,7 @@ unsigned long get_board_sys_clk(void); /* Try to boot an on-QSPI kernel first, then do normal distro boot */ #define CONFIG_BOOTCOMMAND \ "env exists mcinitcmd && env exists secureboot "\ - "&& esbc_validate 0x20780000; " \ + "&& esbc_validate 0x206C0000; " \ "env exists mcinitcmd && " \ "fsl_mc lazyapply dpl 0x20d00000; " \ "run distro_bootcmd;run qspi_bootcmd; " \ @@ -540,7 +540,7 @@ unsigned long get_board_sys_clk(void); /* Try to boot an on-SD kernel first, then do normal distro boot */ #define CONFIG_BOOTCOMMAND \ "env exists mcinitcmd && env exists secureboot "\ - "&& mmcinfo && mmc read $load_addr 0x3c00 0x800 " \ + "&& mmcinfo && mmc read $load_addr 0x3600 0x800 " \ "&& esbc_validate $load_addr; " \ "env exists mcinitcmd && run mcinitcmd " \ "&& mmc read 0x88000000 0x6800 0x800 " \ @@ -551,7 +551,7 @@ unsigned long get_board_sys_clk(void); /* Try to boot an on-NOR kernel first, then do normal distro boot */ #define CONFIG_BOOTCOMMAND \ "env exists mcinitcmd && env exists secureboot "\ - "&& esbc_validate 0x580780000; env exists mcinitcmd "\ + "&& esbc_validate 0x5806C0000; env exists mcinitcmd "\ "&& fsl_mc lazyapply dpl 0x580d00000;" \ "run distro_bootcmd;run nor_bootcmd; " \ "env exists secureboot && esbc_halt;" diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 02cccff0c82..373daebfbc4 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -189,18 +189,18 @@ unsigned long get_board_ddr_clk(void); /* Initial environment variables */ #define XSPI_MC_INIT_CMD \ "env exists secureboot && " \ - "esbc_validate 0x20700000 && " \ - "esbc_validate 0x20740000 ;" \ + "esbc_validate 0x20640000 && " \ + "esbc_validate 0x20680000 ;" \ "fsl_mc start mc 0x20a00000 0x20e00000\0" #define SD_MC_INIT_CMD \ "mmc read 0x80a00000 0x5000 0x1200;" \ "mmc read 0x80e00000 0x7000 0x800;" \ "env exists secureboot && " \ - "mmc read 0x80700000 0x3800 0x20 && " \ - "mmc read 0x80740000 0x3A00 0x20 && " \ - "esbc_validate 0x80700000 && " \ - "esbc_validate 0x80740000 ;" \ + "mmc read 0x80640000 0x3200 0x20 && " \ + "mmc read 0x80680000 0x3400 0x20 && " \ + "esbc_validate 0x80640000 && " \ + "esbc_validate 0x80680000 ;" \ "fsl_mc start mc 0x80a00000 0x80e00000\0" #define EXTRA_ENV_SETTINGS \ @@ -211,7 +211,7 @@ unsigned long get_board_ddr_clk(void); "initrd_high=0xffffffffffffffff\0" \ "fdt_addr=0x64f00000\0" \ "kernel_start=0x1000000\0" \ - "kernelheader_start=0x7C0000\0" \ + "kernelheader_start=0x600000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ "fdtheader_addr_r=0x80100000\0" \ @@ -222,7 +222,7 @@ unsigned long get_board_ddr_clk(void); "load_addr=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "kernel_addr_sd=0x8000\0" \ - "kernelhdr_addr_sd=0x3E00\0" \ + "kernelhdr_addr_sd=0x3000\0" \ "kernel_size_sd=0x1d000\0" \ "kernelhdr_size_sd=0x20\0" \ "console=ttyAMA0,38400n8\0" \ @@ -250,7 +250,7 @@ unsigned long get_board_ddr_clk(void); #define XSPI_NOR_BOOTCOMMAND \ "env exists mcinitcmd && env exists secureboot "\ - "&& esbc_validate 0x20780000; " \ + "&& esbc_validate 0x206C0000; " \ "env exists mcinitcmd && " \ "fsl_mc lazyapply dpl 0x20d00000; " \ "run distro_bootcmd;run xspi_bootcmd; " \ @@ -260,8 +260,8 @@ unsigned long get_board_ddr_clk(void); "env exists mcinitcmd && mmcinfo; " \ "mmc read 0x80d00000 0x6800 0x800; " \ "env exists mcinitcmd && env exists secureboot " \ - " && mmc read 0x80780000 0x3C00 0x20 " \ - "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + " && mmc read 0x806C0000 0x3600 0x20 " \ + "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ "&& fsl_mc lazyapply dpl 0x80d00000;" \ "run distro_bootcmd;run sd_bootcmd;" \ "env exists secureboot && esbc_halt;" diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index f25cab18ae5..1eb63d826f9 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -22,7 +22,9 @@ #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_LBMAP_MASK 0x0f #define QIXIS_LBMAP_SD +#define QIXIS_LBMAP_EMMC #define QIXIS_RCW_SRC_SD 0x08 +#define QIXIS_RCW_SRC_EMMC 0x09 #define NON_EXTENDED_DUTCFG #define QIXIS_SDID_MASK 0x07 #define QIXIS_ESDHC_NO_ADAPTER 0x7 diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index de385f82c89..82d49e53abd 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -22,7 +22,9 @@ #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_LBMAP_MASK 0x0f #define QIXIS_LBMAP_SD +#define QIXIS_LBMAP_EMMC #define QIXIS_RCW_SRC_SD 0x08 +#define QIXIS_RCW_SRC_EMMC 0x09 #define NON_EXTENDED_DUTCFG /* VID */ |