diff options
| author | Alexey Brodkin | 2016-08-04 09:21:50 +0300 |
|---|---|---|
| committer | Alexey Brodkin | 2016-08-05 12:50:25 +0300 |
| commit | 699c4e592b32f43d4ba2cc0d53848118a77d590a (patch) | |
| tree | 75bf7dd85f4d5c2d6a744a0229f5cb4482227381 /arch/arc/lib | |
| parent | ffffcd15948d9d1081afd6f1215a9850bd9f4bd5 (diff) | |
arc: Update exception & interrupt handling for ARCv2
Initially IVT for ARCv2 was simply copypasted from ARCompact
with some selected fixes so basic stuff works.
Now we update it with more ARCv2 specific vectors like
* Software Interrupt
* Division by zero
* Data cache consistency error
* Misaligned access
Also normal interrupts are now implemented properly and extened to
all possible 240 items.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'arch/arc/lib')
| -rw-r--r-- | arch/arc/lib/interrupts.c | 26 | ||||
| -rw-r--r-- | arch/arc/lib/ints_low.S | 28 |
2 files changed, 54 insertions, 0 deletions
diff --git a/arch/arc/lib/interrupts.c b/arch/arc/lib/interrupts.c index d7cab3bb409..ee638d506be 100644 --- a/arch/arc/lib/interrupts.c +++ b/arch/arc/lib/interrupts.c @@ -141,3 +141,29 @@ void do_extension(struct pt_regs *regs) printf("Extension instruction exception\n"); bad_mode(regs); } + +#ifdef CONFIG_ISA_ARCV2 +void do_swi(struct pt_regs *regs) +{ + printf("Software Interrupt exception\n"); + bad_mode(regs); +} + +void do_divzero(unsigned long address, struct pt_regs *regs) +{ + printf("Division by zero exception @ 0x%lx\n", address); + bad_mode(regs); +} + +void do_dcerror(struct pt_regs *regs) +{ + printf("Data cache consistency error exception\n"); + bad_mode(regs); +} + +void do_maligned(unsigned long address, struct pt_regs *regs) +{ + printf("Misaligned data access exception @ 0x%lx\n", address); + bad_mode(regs); +} +#endif diff --git a/arch/arc/lib/ints_low.S b/arch/arc/lib/ints_low.S index 161cf37dc48..e3778847aba 100644 --- a/arch/arc/lib/ints_low.S +++ b/arch/arc/lib/ints_low.S @@ -149,3 +149,31 @@ ENTRY(EV_Extension) mov %r0, %sp j do_extension ENDPROC(EV_Extension) + +#ifdef CONFIG_ISA_ARCV2 +ENTRY(EV_SWI) + SAVE_ALL_SYS + mov %r0, %sp + j do_swi +ENDPROC(EV_SWI) + +ENTRY(EV_DivZero) + SAVE_ALL_SYS + SAVE_EXCEPTION_SOURCE + mov %r1, %sp + j do_divzero +ENDPROC(EV_DivZero) + +ENTRY(EV_DCError) + SAVE_ALL_SYS + mov %r0, %sp + j do_dcerror +ENDPROC(EV_DCError) + +ENTRY(EV_Maligned) + SAVE_ALL_SYS + SAVE_EXCEPTION_SOURCE + mov %r1, %sp + j do_maligned +ENDPROC(EV_Maligned) +#endif |