diff options
| author | Stefan Roese | 2015-09-02 11:10:58 +0200 |
|---|---|---|
| committer | Tom Rini | 2015-09-11 17:15:14 -0400 |
| commit | da53ba0219c65c11a673ec11c0c2ad371c74251f (patch) | |
| tree | bca5a97096f86a1777519e0c592f924b49c344f6 /arch/arm/cpu/arm926ejs | |
| parent | 1a103c6caa0b27fcd3798267b980444f5459860f (diff) | |
arm: spear: Add command to switch between 1-bit HW ECC and SW BCH4
This patch adds the "nandecc" command to switch between the SPEAr600 internal
1-bit HW ECC and the 4-bit SW BCH4 ECC. This can be needed to support NAND
chips with a stronger ECC than 1-bit, as on the x600. And to dynamically
switch between both ECC schemes for backwards compatibility.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'arch/arm/cpu/arm926ejs')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/spear/cpu.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/spear/cpu.c b/arch/arm/cpu/arm926ejs/spear/cpu.c index e39cdbaa6e5..be0d14fbf04 100644 --- a/arch/arm/cpu/arm926ejs/spear/cpu.c +++ b/arch/arm/cpu/arm926ejs/spear/cpu.c @@ -83,3 +83,37 @@ int print_cpuinfo(void) return 0; } #endif + +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_ECC_BCH) +static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + if (argc != 2) + goto usage; + + if (strncmp(argv[1], "hw", 2) == 0) { + /* 1-bit HW ECC */ + printf("Switching to 1-bit HW ECC\n"); + fsmc_nand_switch_ecc(1); + } else if (strncmp(argv[1], "bch4", 2) == 0) { + /* 4-bit SW ECC BCH4 */ + printf("Switching to 4-bit SW ECC (BCH4)\n"); + fsmc_nand_switch_ecc(4); + } else { + goto usage; + } + + return 0; + +usage: + printf("Usage: nandecc %s\n", cmdtp->usage); + return 1; +} + +U_BOOT_CMD( + nandecc, 2, 0, do_switch_ecc, + "switch NAND ECC calculation algorithm", + "hw|bch4 - Switch between NAND hardware 1-bit HW and" + " 4-bit SW BCH\n" +); +#endif |