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authorLubomir Popov2013-05-15 04:41:01 +0000
committerTom Rini2013-06-10 08:54:46 -0400
commitee28edac4322602685ea12dc46edad1ec6b60487 (patch)
tree344057b8fb5c0ff78e35989c60a9b0f0bb28ba2a /arch/arm/cpu/armv7/omap5
parent960187ffa125b3938fec4b827bd9e8c04a204af8 (diff)
OMAP5: Enable access to auxclk registers
auxclk0 and auxclk1 are utilized on some OMAP5 boards. Define the infrastructure needed for accessing them without using magic numbers. Also remove unrelated TPS62361 defines from clocks.h Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap5')
-rw-r--r--arch/arm/cpu/armv7/omap5/prcm-regs.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 5a7370c7732..e839ff5fe53 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -308,6 +308,10 @@ struct prcm_regs const omap5_es1_prcm = {
.prm_sldo_mpu_ctrl = 0x4ae07bd0,
.prm_sldo_mm_setup = 0x4ae07bd4,
.prm_sldo_mm_ctrl = 0x4ae07bd8,
+
+ /* SCRM stuff, used by some boards */
+ .scrm_auxclk0 = 0x4ae0a310,
+ .scrm_auxclk1 = 0x4ae0a314,
};
struct omap_sys_ctrl_regs const omap5_ctrl = {
@@ -751,6 +755,10 @@ struct prcm_regs const omap5_es2_prcm = {
.prm_sldo_mm_ctrl = 0x4ae07cd8,
.prm_abbldo_mpu_setup = 0x4ae07cdc,
.prm_abbldo_mpu_ctrl = 0x4ae07ce0,
+
+ /* SCRM stuff, used by some boards */
+ .scrm_auxclk0 = 0x4ae0a310,
+ .scrm_auxclk1 = 0x4ae0a314,
};
struct prcm_regs const dra7xx_prcm = {