diff options
| author | Michal Simek | 2013-02-04 12:42:25 +0100 |
|---|---|---|
| committer | Michal Simek | 2013-02-07 09:18:42 +0100 |
| commit | 00ed34589880ca7092999ec5b92e061018d0fd0f (patch) | |
| tree | b83ab2ea09539769aac217c09718111f4174dd3c /arch/arm/cpu/armv7/zynq | |
| parent | 59c651f4e2b7614e97c2fda10eeabd00529dd740 (diff) | |
arm: zynq: Add lowlevel initialization to C
Do lowlevel initialization directly in C. Zynq do not
require to do it in asm.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/cpu/armv7/zynq')
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/cpu.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c index 91618d3d8ae..e8f4c19d490 100644 --- a/arch/arm/cpu/armv7/zynq/cpu.c +++ b/arch/arm/cpu/armv7/zynq/cpu.c @@ -21,9 +21,33 @@ * MA 02111-1307 USA */ #include <common.h> +#include <asm/io.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> -inline void lowlevel_init(void) {} +void lowlevel_init(void) +{ + zynq_slcr_unlock(); + /* remap DDR to zero, FILTERSTART */ + writel(0, &scu_base->filter_start); + + /* Device config APB, unlock the PCAP */ + writel(0x757BDF0D, &devcfg_base->unlock); + writel(0xFFFFFFFF, &devcfg_base->rom_shadow); + + /* OCM_CFG, Mask out the ROM, map ram into upper addresses */ + writel(0x1F, &slcr_base->ocm_cfg); + /* FPGA_RST_CTRL, clear resets on AXI fabric ports */ + writel(0x0, &slcr_base->fpga_rst_ctrl); + /* TZ_DDR_RAM, Set DDR trust zone non-secure */ + writel(0xFFFFFFFF, &slcr_base->trust_zone); + /* Set urgent bits with register */ + writel(0x0, &slcr_base->ddr_urgent_sel); + /* Urgent write, ports S2/S3 */ + writel(0xC, &slcr_base->ddr_urgent); + + zynq_slcr_lock(); +} void reset_cpu(ulong addr) { |