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authorTom Rini2023-01-10 11:19:41 -0500
committerTom Rini2023-01-20 12:27:06 -0500
commit89c90cadf371cafe06ce99b80c0334043fabf5cd (patch)
tree16cdb2318f114749ff4137f3ef76c225751d13a1 /arch/arm/cpu
parentbd22bde92ed62d3ae52164e1428c7dbc43eb14f8 (diff)
nxp: Finish migration of SYS_FSL_IFC_BANK_COUNT to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be asked in arch/Kconfig.nxp. Set the PowerPC defaults based on arch/powerpc/include/asm/config_mpc85xx.h and remove the default set in drivers/mtd/nand/raw/fsl_ifc_nand.c Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv7/ls102xa/Kconfig4
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig7
2 files changed, 0 insertions, 11 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index a83eb7e8fdd..64fea9a0c4d 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -102,10 +102,6 @@ config SYS_FSL_SRDS_2
config SYS_HAS_SERDES
bool
-config SYS_FSL_IFC_BANK_COUNT
- int "Maximum banks of Integrated flash controller"
- default 8
-
config SYS_FSL_ERRATUM_A008407
bool
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9656c52e955..dcb1ca5e12e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -525,13 +525,6 @@ config SYS_CCI400_OFFSET
Offset for CCI400 base
CCI400 base addr = CCSRBAR + CCI400_OFFSET
-config SYS_FSL_IFC_BANK_COUNT
- int "Maximum banks of Integrated flash controller"
- depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A || ARCH_LS1088A
- default 4 if ARCH_LS1043A
- default 4 if ARCH_LS1046A
- default 8 if ARCH_LS2080A || ARCH_LS1088A
-
config SYS_FSL_HAS_CCI400
bool