diff options
author | Lokesh Vutla | 2018-04-26 18:21:31 +0530 |
---|---|---|
committer | Tom Rini | 2018-05-07 15:53:29 -0400 |
commit | a43d46a73cb2c40481791cb292b8eb0b5a80d55e (patch) | |
tree | 5458c3f283627933415fcc73e96c0c13c6a08c42 /arch/arm/cpu | |
parent | f2ef204312480bfba7700f47c8ce9fb975c26557 (diff) |
arm: v7R: Add support for enabling caches
Cache maintenance procedure is same for v7A and v7R
processors. So re-use cache-cp15.c file except for
mmu parts.
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/armv7/mpu_v7r.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mpu_v7r.c b/arch/arm/cpu/armv7/mpu_v7r.c index 567d9134144..7adecffff87 100644 --- a/arch/arm/cpu/armv7/mpu_v7r.c +++ b/arch/arm/cpu/armv7/mpu_v7r.c @@ -106,3 +106,14 @@ void setup_mpu_regions(struct mpu_region_config *rgns, u32 num_rgns) icache_enable(); } + +void enable_caches(void) +{ + /* + * setup_mpu_regions() might have enabled Icache. So add a check + * before enabling Icache + */ + if (!icache_status()) + icache_enable(); + dcache_enable(); +} |