diff options
| author | Shaohui Xie | 2016-09-07 17:56:14 +0800 |
|---|---|---|
| committer | York Sun | 2016-09-14 14:11:10 -0700 |
| commit | 126fe70d7746d7e60a6331391cab6713368b78dc (patch) | |
| tree | 493e24425877158f124d576bea9d29bc365c3385 /arch/arm/dts/fsl-ls1046a-qds.dtsi | |
| parent | dd02936f81de477680f27af244fd2085ce460152 (diff) | |
armv8: ls1046aqds: Add LS1046AQDS board support
LS1046AQDS Specification:
-------------------------
Memory subsystem:
* 8GByte DDR4 SDRAM (64bit bus)
* 128 Mbyte NOR flash single-chip memory
* 512 Mbyte NAND flash
* 64 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
Ethernet:
* Two XFI 10G ports
* Two SGMII ports
* Two RGMII ports
PCIe: supports Gen 1 and Gen 2
SATA 3.0: one SATA 3.0 port
USB 3.0: two micro AB connector and one type A connector
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/dts/fsl-ls1046a-qds.dtsi')
| -rw-r--r-- | arch/arm/dts/fsl-ls1046a-qds.dtsi | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/arch/arm/dts/fsl-ls1046a-qds.dtsi b/arch/arm/dts/fsl-ls1046a-qds.dtsi new file mode 100644 index 00000000000..c5122930fe1 --- /dev/null +++ b/arch/arm/dts/fsl-ls1046a-qds.dtsi @@ -0,0 +1,77 @@ +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * + * Copyright (C) 2016, Freescale Semiconductor + * + * Mingkai Hu <Mingkai.hu@nxp.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/include/ "fsl-ls1046a.dtsi" + +/ { + model = "LS1046A QDS Board"; + aliases { + spi0 = &qspi; + spi1 = &dspi0; + }; +}; + +&dspi0 { + bus-num = <0>; + status = "okay"; + + dflash0: n25q128a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <1000000>; /* input clock */ + spi-cpol; + spi-cpha; + reg = <0>; + }; + + dflash1: sst25wf040b { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3500000>; + spi-cpol; + spi-cpha; + reg = <1>; + }; + + dflash2: en25s64 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3500000>; + spi-cpol; + spi-cpha; + reg = <2>; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: s25fl128s@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + +&duart0 { + status = "okay"; +}; + +&duart1 { + status = "okay"; +}; |