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author | Marcel Ziswiler | 2022-10-22 23:59:40 +0200 |
---|---|---|
committer | Stefano Babic | 2022-10-24 13:43:21 +0200 |
commit | 10f4f3f569976b7d8d0488b362ad5d97b3ca67f8 (patch) | |
tree | cbc67736bb72bf9c0165d6fe52234c7c39371c84 /arch/arm/dts/imx53-cx9020.dts | |
parent | fa4ce85194fea38202a7874e881c363e45b3decc (diff) |
imx53: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm/dts/imx53-cx9020.dts')
-rw-r--r-- | arch/arm/dts/imx53-cx9020.dts | 414 |
1 files changed, 239 insertions, 175 deletions
diff --git a/arch/arm/dts/imx53-cx9020.dts b/arch/arm/dts/imx53-cx9020.dts index e08850999b1..cfb18849a92 100644 --- a/arch/arm/dts/imx53-cx9020.dts +++ b/arch/arm/dts/imx53-cx9020.dts @@ -1,195 +1,133 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 +// SPDX-License-Identifier: GPL-2.0-or-later /* - * Copyright 2016 Beckhoff Automation - * Copyright 2011 Freescale Semiconductor, Inc. - * Copyright 2011 Linaro Ltd. + * Copyright 2017 Beckhoff Automation GmbH & Co. KG + * based on imx53-qsb.dts */ /dts-v1/; #include "imx53.dtsi" -#define MX53_PAD_EIM_D26__UART2_RXD_MUX 0x144 0x48c 0x880 0x2 0x0 -#define MX53_PAD_EIM_D27__UART2_TXD_MUX 0x148 0x490 0x000 0x2 0x0 -#define MX53_PAD_EIM_D28__UART2_RTS 0x14c 0x494 0x87c 0x2 0x0 -#define MX53_PAD_EIM_D29__UART2_CTS 0x150 0x498 0x000 0x2 0x0 - / { - model = "Beckhoff CX9020-0100 i.MX53"; - compatible = "fsl,imx53-qsb", "fsl,imx53"; + model = "Beckhoff CX9020 Embedded PC"; + compatible = "bhf,cx9020", "fsl,imx53"; chosen { stdout-path = &uart2; }; -}; -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; + memory@70000000 { + device_type = "memory"; + reg = <0x70000000 0x20000000>, + <0xb0000000 0x20000000>; + }; + + display-0 { + #address-cells =<1>; + #size-cells = <0>; + compatible = "fsl,imx-parallel-display"; + interface-pix-fmt = "rgb24"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu_disp0>; + + port@0 { + reg = <0>; + + display0_in: endpoint { + remote-endpoint = <&ipu_di0_disp0>; + }; + }; + + port@1 { + reg = <1>; + + display0_out: endpoint { + remote-endpoint = <&tfp410_in>; + }; + }; + }; + + dvi-connector { + compatible = "dvi-connector"; + ddc-i2c-bus = <&i2c2>; + digital; + + port { + dvi_connector_in: endpoint { + remote-endpoint = <&tfp410_out>; + }; + }; + }; - imx53-qsb { - pinctrl_hog: hoggrp { - fsl,pins = < - MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 - MX53_PAD_GPIO_8__GPIO1_8 0x80000000 - MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 - MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 - MX53_PAD_GPIO_1__GPIO1_1 0x80000000 - MX53_PAD_GPIO_4__GPIO1_4 0x80000000 - MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 - MX53_PAD_GPIO_16__GPIO7_11 0x80000000 - - MX53_PAD_EIM_OE__EMI_WEIM_OE 0x80000000 - MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT 0x80000000 - MX53_PAD_EIM_LBA__EMI_WEIM_LBA 0x80000000 - MX53_PAD_EIM_RW__EMI_WEIM_RW 0x80000000 - MX53_PAD_EIM_EB0__EMI_WEIM_EB_0 0x80000000 - MX53_PAD_EIM_EB1__EMI_WEIM_EB_1 0x80000000 - MX53_PAD_EIM_EB2__EMI_WEIM_EB_2 0x80000000 - MX53_PAD_EIM_EB3__EMI_WEIM_EB_3 0x80000000 - MX53_PAD_EIM_CS0__EMI_WEIM_CS_0 0x80000000 - MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x80000000 - MX53_PAD_EIM_A16__EMI_WEIM_A_16 0x80000000 - MX53_PAD_EIM_A17__EMI_WEIM_A_17 0x80000000 - MX53_PAD_EIM_A18__EMI_WEIM_A_18 0x80000000 - MX53_PAD_EIM_A19__EMI_WEIM_A_19 0x80000000 - MX53_PAD_EIM_A20__EMI_WEIM_A_20 0x80000000 - MX53_PAD_EIM_A21__EMI_WEIM_A_21 0x80000000 - MX53_PAD_EIM_A22__EMI_WEIM_A_22 0x80000000 - MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4 - MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4 - MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4 - MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4 - MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4 - MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4 - MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4 - MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4 - MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8 0xa4 - MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9 0xa4 - MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10 0xa4 - MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11 0xa4 - MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12 0xa4 - MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13 0xa4 - MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14 0xa4 - MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15 0xa4 - MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4 - MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4 - MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4 - MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4 - MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4 - MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4 - MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4 - MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4 - MX53_PAD_PATA_DATA8__EMI_NANDF_D_8 0xa4 - MX53_PAD_PATA_DATA9__EMI_NANDF_D_9 0xa4 - MX53_PAD_PATA_DATA10__EMI_NANDF_D_10 0xa4 - MX53_PAD_PATA_DATA11__EMI_NANDF_D_11 0xa4 - MX53_PAD_PATA_DATA12__EMI_NANDF_D_12 0xa4 - MX53_PAD_PATA_DATA13__EMI_NANDF_D_13 0xa4 - MX53_PAD_PATA_DATA14__EMI_NANDF_D_14 0xa4 - MX53_PAD_PATA_DATA15__EMI_NANDF_D_15 0xa4 - MX53_PAD_NANDF_CLE__GPIO6_7 0x00000001 - MX53_PAD_NANDF_WP_B__GPIO6_9 0x00000001 - MX53_PAD_NANDF_ALE__GPIO6_8 0x00000001 - - MX53_PAD_EIM_D23__GPIO3_23 0x80000000 - - MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000 - MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000 - MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000 - MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000 - - MX53_PAD_CSI0_DAT8__I2C1_SDA 0x400001ec - MX53_PAD_CSI0_DAT9__I2C1_SCL 0x400001ec - - MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 - MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 - - MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5 - MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 - MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 - MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 - MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5 - MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 - MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 - MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 - MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 - MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 - MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 - MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 - MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5 - MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5 - MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5 - MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5 - MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5 - MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5 - MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5 - MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5 - MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5 - MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5 - MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5 - MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5 - MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5 - MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5 - MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5 - MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5 - MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5 - >; + dvi-converter { + compatible = "ti,tfp410"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + tfp410_in: endpoint { + remote-endpoint = <&display0_out>; + }; + }; + + port@1 { + reg = <1>; + + tfp410_out: endpoint { + remote-endpoint = <&dvi_connector_in>; + }; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + pwr-r { + gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; + default-state = "off"; }; - pinctrl_fec0: fec0grp { - fsl,pins = < - MX53_PAD_FEC_MDC__FEC_MDC 0x4 - MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc - MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180 - MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180 - MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180 - MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180 - MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180 - MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4 - MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4 - MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4 - >; + pwr-g { + gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; + default-state = "on"; }; - pinctrl_esdhc1: esdhc1grp { - fsl,pins = < - MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 - MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 - MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 - MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 - MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 - MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 - >; + pwr-b { + gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; + default-state = "off"; }; - pinctrl_esdhc2: esdhc2grp { - fsl,pins = < - MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 - MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 - MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 - MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 - MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 - MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 - >; + sd1-b { + linux,default-trigger = "mmc0"; + gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; }; - pinctrl_uart2: uart2grp { - fsl,pins = < - MX53_PAD_EIM_D26__UART2_RXD_MUX 0x1e4 - MX53_PAD_EIM_D27__UART2_TXD_MUX 0x1e4 - MX53_PAD_EIM_D28__UART2_RTS 0x1e4 - MX53_PAD_EIM_D29__UART2_CTS 0x1e4 - >; + sd2-b { + linux,default-trigger = "mmc1"; + gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; }; }; -}; -&uart2 { - pinctrl-names = "default"; - uart-has-rtscts; - fsl,dte-mode; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; + regulator-3p2v { + compatible = "regulator-fixed"; + regulator-name = "3P2V"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-always-on; + }; + + reg_usb_vbus: regulator-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &esdhc1 { @@ -210,22 +148,148 @@ &fec { pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio7 6 0>; - pinctrl-0 = <&pinctrl_fec0>; + phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&ipu_di0_disp0 { + remote-endpoint = <&display0_in>; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + fsl,dte-mode; status = "okay"; - fixed-link { /* RMII fixed link to KZ8863 */ - speed = <100>; - full-duplex; - }; }; &usbh1 { + vbus-supply = <®_usb_vbus>; phy_type = "utmi"; status = "okay"; }; &usbotg { - dr_mode = "host"; + dr_mode = "peripheral"; status = "okay"; }; + +&vpu { + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_hog: hoggrp { + fsl,pins = < + MX53_PAD_GPIO_0__CCM_CLKO 0x1c4 + MX53_PAD_GPIO_16__I2C3_SDA 0x1c4 + MX53_PAD_EIM_D22__GPIO3_22 0x1c4 + MX53_PAD_EIM_D23__GPIO3_23 0x1e4 + MX53_PAD_EIM_D24__GPIO3_24 0x1e4 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 + MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 + MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 + MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 + MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 + MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 + MX53_PAD_GPIO_1__ESDHC1_CD 0x1c4 + MX53_PAD_EIM_D17__GPIO3_17 0x1e4 + MX53_PAD_GPIO_3__GPIO1_3 0x1c4 + >; + }; + + pinctrl_esdhc2: esdhc2grp { + fsl,pins = < + MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 + MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 + MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 + MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 + MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 + MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 + MX53_PAD_GPIO_4__ESDHC2_CD 0x1e4 + MX53_PAD_EIM_D20__GPIO3_20 0x1e4 + MX53_PAD_GPIO_8__GPIO1_8 0x1c4 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX53_PAD_FEC_MDC__FEC_MDC 0x4 + MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180 + MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180 + MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180 + MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180 + MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180 + MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4 + MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4 + MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 + MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 + >; + }; + + pinctrl_ipu_disp0: ipudisp0grp { + fsl,pins = < + MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5 + MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 + MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 + MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 + MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5 + MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 + MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 + MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 + MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 + MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 + MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 + MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 + MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5 + MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5 + MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5 + MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5 + MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5 + MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5 + MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5 + MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5 + MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5 + MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5 + MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5 + MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5 + MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5 + MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5 + MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5 + MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5 + MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX53_PAD_EIM_D26__UART2_RXD_MUX 0x1e4 + MX53_PAD_EIM_D27__UART2_TXD_MUX 0x1e4 + MX53_PAD_EIM_D28__UART2_RTS 0x1e4 + MX53_PAD_EIM_D29__UART2_CTS 0x1e4 + >; + }; +}; |