diff options
| author | Nishanth Menon | 2023-11-13 08:51:43 -0600 |
|---|---|---|
| committer | Tom Rini | 2024-01-03 08:52:19 -0500 |
| commit | e703bfcb38ce837c5fd9e12ad15412eae951a7d7 (patch) | |
| tree | 27ee8c18fb5fd9aa25d4fd7547598880e70d8533 /arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | |
| parent | 244c9fd1a540b5ac7c4a67c8e8acfb0690a2075b (diff) | |
arm: dts: k3-am62a*: Sync with kernel v6.7-rc1
Sync with kernel v6.7-rc1 and sync up the u-boot dts files accordingly.
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-am62a7-sk-u-boot.dtsi')
| -rw-r--r-- | arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 139 |
1 files changed, 94 insertions, 45 deletions
diff --git a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi index cf938c43b83..31b89b41748 100644 --- a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi @@ -4,137 +4,186 @@ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ +#include "k3-am62a-sk-binman.dtsi" + / { chosen { stdout-path = "serial2:115200n8"; - tick-timer = &timer1; + tick-timer = &main_timer0; }; memory@80000000 { - bootph-pre-ram; + bootph-all; }; }; -&cbass_main{ - bootph-pre-ram; +&main_timer0 { + bootph-all; +}; - timer1: timer@2400000 { - compatible = "ti,omap5430-timer"; - reg = <0x00 0x2400000 0x00 0x80>; - ti,timer-alwon; - clock-frequency = <25000000>; - bootph-pre-ram; - }; +&cbass_main { + bootph-all; }; &dmss { - bootph-pre-ram; + bootph-all; }; &secure_proxy_main { - bootph-pre-ram; + bootph-all; }; &dmsc { - bootph-pre-ram; + bootph-all; }; &k3_pds { - bootph-pre-ram; + bootph-all; }; &k3_clks { - bootph-pre-ram; + bootph-all; }; &k3_reset { - bootph-pre-ram; + bootph-all; }; &wkup_conf { - bootph-pre-ram; + bootph-all; }; &chipid { - bootph-pre-ram; + bootph-all; }; &main_pmx0 { - bootph-pre-ram; + bootph-all; }; &main_uart0 { - bootph-pre-ram; + bootph-all; }; &main_uart0_pins_default { - bootph-pre-ram; -}; - -&main_uart1 { - bootph-pre-ram; + bootph-all; }; &cbass_mcu { - bootph-pre-ram; + bootph-all; }; &cbass_wakeup { - bootph-pre-ram; + bootph-all; }; &mcu_pmx0 { - bootph-pre-ram; -}; - -&wkup_uart0 { - bootph-pre-ram; + bootph-all; }; &main_gpio0 { - bootph-pre-ram; + bootph-all; }; &main_i2c0 { - bootph-pre-ram; + bootph-all; }; &main_i2c0_pins_default { - bootph-pre-ram; + bootph-all; }; &main_i2c1 { - bootph-pre-ram; + bootph-all; }; &main_i2c1_pins_default { - bootph-pre-ram; + bootph-all; }; &exp1 { - bootph-pre-ram; + bootph-all; }; &sdhci1 { - bootph-pre-ram; + bootph-all; }; &main_mmc1_pins_default { - bootph-pre-ram; + bootph-all; }; &k3_reset { - bootph-pre-ram; + bootph-all; }; &dmsc { - bootph-pre-ram; + bootph-all; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - bootph-pre-ram; + bootph-all; }; }; &vdd_mmc1 { - bootph-pre-ram; + bootph-all; +}; + +&main_bcdma { + reg = <0x00 0x485c0100 0x00 0x100>, + <0x00 0x4c000000 0x00 0x20000>, + <0x00 0x4a820000 0x00 0x20000>, + <0x00 0x4aa40000 0x00 0x20000>, + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", + "ringrt" , "cfg", "tchan", "rchan"; + bootph-all; +}; + +&main_pktdma { + reg = <0x00 0x485c0000 0x00 0x100>, + <0x00 0x4a800000 0x00 0x20000>, + <0x00 0x4aa00000 0x00 0x20000>, + <0x00 0x4b800000 0x00 0x200000>, + <0x00 0x485e0000 0x00 0x10000>, + <0x00 0x484a0000 0x00 0x2000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x1000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", + "cfg", "tchan", "rchan", "rflow"; + bootph-all; +}; + +&main_mdio1_pins_default { + bootph-all; +}; + +&cpsw3g_mdio { + bootph-all; +}; + +&cpsw3g_phy0 { + bootph-all; +}; + +&main_rgmii1_pins_default { + bootph-all; +}; + +&phy_gmii_sel { + bootph-all; +}; + +&cpsw3g { + bootph-all; + ethernet-ports { + bootph-all; + }; +}; + +&cpsw_port1 { + bootph-all; }; |