diff options
| author | Konrad Dybcio | 2023-11-07 12:41:01 +0000 |
|---|---|---|
| committer | Caleb Connolly | 2024-01-16 12:26:23 +0000 |
| commit | 3ead661633293413e9af6d1e20c0a1a362d08ee8 (patch) | |
| tree | 90abadb47988c06b9a62bf0ab3828fc783edfab8 /arch/arm/dts/qcs404-evb.dts | |
| parent | fac2121a47fe5fe6af45af0f5acfa5b8bd369b52 (diff) | |
clk/qcom: handle resets and clocks in one device
Qualcomm's clock controller blocks actually do much more than it
says on the tin.. They provide clocks, resets and power domains.
Currently, U-Boot requires one to spawn 2 separate devices for
controlling clocks and resets, both spanning the same register space.
Refactor the code to make it work with just a single DT node, making
it compatible with upstream Linux bindings and dropping the dedicated
reset driver in favour of including it in the clock driver.
Heavily inspired by Renesas code for a similar hw block.
[caleb: moved drivers to clk/qcom, added reset driver and adjusted bind
logic. Imported qcom,gcc-ipq4019.h from Linux]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Diffstat (limited to 'arch/arm/dts/qcs404-evb.dts')
| -rw-r--r-- | arch/arm/dts/qcs404-evb.dts | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts index 8d7893c1169..84224a8a3d3 100644 --- a/arch/arm/dts/qcs404-evb.dts +++ b/arch/arm/dts/qcs404-evb.dts @@ -208,11 +208,6 @@ #address-cells = <0x1>; #size-cells = <0x0>; #clock-cells = <1>; - }; - - reset: gcc-reset@1800000 { - compatible = "qcom,gcc-reset-qcs404"; - reg = <0x1800000 0x80000>; #reset-cells = <1>; }; @@ -245,8 +240,8 @@ clocks = <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, <&gcc GCC_USB3_PHY_PIPE_CLK>; clock-names = "ahb", "pipe"; - resets = <&reset GCC_USB3_PHY_BCR>, - <&reset GCC_USB3PHY_PHY_BCR>; + resets = <&gcc GCC_USB3_PHY_BCR>, + <&gcc GCC_USB3PHY_PHY_BCR>; reset-names = "com", "phy"; }; @@ -257,8 +252,8 @@ clocks = <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; clock-names = "ahb", "sleep"; - resets = <&reset GCC_USB_HS_PHY_CFG_AHB_BCR>, - <&reset GCC_USB2A_PHY_BCR>; + resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, + <&gcc GCC_USB2A_PHY_BCR>; reset-names = "phy", "por"; }; @@ -269,8 +264,8 @@ clocks = <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; clock-names = "ahb", "sleep"; - resets = <&reset GCC_QUSB2_PHY_BCR>, - <&reset GCC_USB2_HS_PHY_ONLY_BCR>; + resets = <&gcc GCC_QUSB2_PHY_BCR>, + <&gcc GCC_USB2_HS_PHY_ONLY_BCR>; reset-names = "phy", "por"; }; @@ -335,7 +330,7 @@ <&gcc GCC_ETH_PTP_CLK>, <&gcc GCC_ETH_RGMII_CLK>; - resets = <&reset GCC_EMAC_BCR>; + resets = <&gcc GCC_EMAC_BCR>; reset-names = "emac"; snps,tso; |