diff options
| author | Eugen Hristev | 2022-11-25 09:54:53 +0200 |
|---|---|---|
| committer | Eugen Hristev | 2022-12-20 11:59:07 +0200 |
| commit | 4df35b38d12c0c5630efe373870b5f557262af57 (patch) | |
| tree | 9402c518762a9df1cc42ea65fecfdd9b4ca4a02f /arch/arm/dts/sama7g5.dtsi | |
| parent | 9859b9a7224b9a2b51d2d6168bbd0164f4885a0e (diff) | |
ARM: dts: at91: sama7g5/sama7g5ek: align DT with kernel 6.1
Align the DT with current Linux 6.1 tree, wherever possible.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Diffstat (limited to 'arch/arm/dts/sama7g5.dtsi')
| -rw-r--r-- | arch/arm/dts/sama7g5.dtsi | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index d38090d7ddc..6388a60e53b 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/clk/at91.h> #include <dt-bindings/dma/at91.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/mfd/at91-usart.h> / { model = "Microchip SAMA7G5 family SoC"; @@ -195,11 +196,11 @@ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; interrupt-controller; #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; }; pmc: pmc@e0018000 { @@ -211,6 +212,13 @@ clock-names = "td_slck", "md_slck", "main_xtal", "main_rc"; }; + reset_controller: reset-controller@e001d000 { + compatible = "microchip,sama7g5-rstc"; + reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>; + #reset-cells = <1>; + clocks = <&clk32k 0>; + }; + shdwc: shdwc@e001d010 { compatible = "microchip,sama7g5-shdwc", "syscon"; reg = <0xe001d010 0x10>; @@ -229,13 +237,6 @@ clocks = <&clk32k 0>; }; - reset_controller: rstc@e001d000 { - compatible = "microchip,sama7g5-rstc", "microchip,sam9x60-rstc"; - reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>; - #reset-cells = <1>; - clocks = <&clk32k 0>; - }; - clk32k: clock-controller@e001d050 { compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc"; reg = <0xe001d050 0x4>; @@ -620,6 +621,7 @@ uart0: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; clock-names = "usart"; @@ -668,6 +670,7 @@ uart3: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; clock-names = "usart"; @@ -711,6 +714,7 @@ uart4: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; clock-names = "usart"; @@ -736,6 +740,7 @@ uart7: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; clock-names = "usart"; @@ -884,9 +889,9 @@ #address-cells = <1>; #size-cells = <0>; atmel,fifo-size = <32>; - dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>, - <&dma0 AT91_XDMAC_DT_PERID(28)>; - dma-names = "rx", "tx"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(28)>, + <&dma0 AT91_XDMAC_DT_PERID(27)>; + dma-names = "tx", "rx"; status = "disabled"; }; }; |