diff options
author | dillon min | 2021-04-09 15:28:42 +0800 |
---|---|---|
committer | Patrice Chotard | 2021-04-09 11:53:00 +0200 |
commit | 403502247341e12f5973b9b6820ae9f9dd888c39 (patch) | |
tree | 984f34e12f9b820aa763d6b6729c602263982a5e /arch/arm/dts/stm32h743.dtsi | |
parent | e690ff4669634fabcc68cc9569a82535cd568860 (diff) |
ARM: dts: stm32: add new instances for stm32h743 MCU
Some instances are missing in current support of stm32h743 MCU. This commit
adds usart3/uart4 and sdmmc2 support.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'arch/arm/dts/stm32h743.dtsi')
-rw-r--r-- | arch/arm/dts/stm32h743.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32h743.dtsi b/arch/arm/dts/stm32h743.dtsi index 8c96698b251..77a8aef8e47 100644 --- a/arch/arm/dts/stm32h743.dtsi +++ b/arch/arm/dts/stm32h743.dtsi @@ -99,6 +99,22 @@ clocks = <&rcc USART2_CK>; }; + usart3: serial@40004800 { + compatible = "st,stm32h7-uart"; + reg = <0x40004800 0x400>; + interrupts = <39>; + status = "disabled"; + clocks = <&rcc USART3_CK>; + }; + + uart4: serial@40004c00 { + compatible = "st,stm32h7-uart"; + reg = <0x40004c00 0x400>; + interrupts = <52>; + status = "disabled"; + clocks = <&rcc UART4_CK>; + }; + i2c1: i2c@40005400 { compatible = "st,stm32f7-i2c"; #address-cells = <1>; @@ -332,6 +348,20 @@ max-frequency = <120000000>; }; + sdmmc2: sdmmc@48022400 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x10153180>; + reg = <0x48022400 0x400>; + interrupts = <124>; + interrupt-names = "cmd_irq"; + clocks = <&rcc SDMMC2_CK>; + clock-names = "apb_pclk"; + resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <120000000>; + }; + exti: interrupt-controller@58000000 { compatible = "st,stm32h7-exti"; interrupt-controller; |