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| author | Michal Simek | 2021-08-06 13:30:19 +0200 |
|---|---|---|
| committer | Michal Simek | 2021-08-26 08:08:11 +0200 |
| commit | 0df062bf04c1a530a831ed65f2a53f90645addde (patch) | |
| tree | 6e3036a4d004948a97c0e0f242b7c50367d6cfa3 /arch/arm/dts/zynq-zc702.dts | |
| parent | b9c4e8d439ddce576e569acb0880d36002e71448 (diff) | |
ARM: zynq: Wire single qspi on couple of boards
Single configuration is working fine and no issue to enable it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/zynq-zc702.dts')
| -rw-r--r-- | arch/arm/dts/zynq-zc702.dts | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index 57a47409b91..f2e05a55b95 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -409,6 +409,14 @@ &qspi { u-boot,dm-pre-reloc; status = "okay"; + num-cs = <1>; + flash@0 { + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + }; }; &sdhci0 { |