diff options
| author | Piotr Wilczek | 2014-03-07 14:59:43 +0100 |
|---|---|---|
| committer | Minkyu Kang | 2014-03-12 19:54:59 +0900 |
| commit | 8e5e1e6a92acfa465d993ab099ca1c54c4cadc8d (patch) | |
| tree | 7ae8d2009d6b22314c1c37ae3af92372772668d4 /arch/arm/dts | |
| parent | 4c1dd998523633c8649c6e322ffe6f625dcc234e (diff) | |
arm:exynos: add common DTS file for exynos 4
This patch adds common dtsi file and config header for all
Exynos 4 based boards.
Patch additionaly adds board specific (weak) functions for
board_early_init_f and board_power_init functions.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/exynos4.dtsi | 138 |
1 files changed, 138 insertions, 0 deletions
diff --git a/arch/arm/dts/exynos4.dtsi b/arch/arm/dts/exynos4.dtsi new file mode 100644 index 00000000000..71dc7ebf4a4 --- /dev/null +++ b/arch/arm/dts/exynos4.dtsi @@ -0,0 +1,138 @@ +/* + * Samsung's Exynos4 SoC common device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/include/ "skeleton.dtsi" + +/ { + serial@13800000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13800000 0x3c>; + id = <0>; + }; + + serial@13810000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13810000 0x3c>; + id = <1>; + }; + + serial@13820000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13820000 0x3c>; + id = <2>; + }; + + serial@13830000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13830000 0x3c>; + id = <3>; + }; + + serial@13840000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13840000 0x3c>; + id = <4>; + }; + + i2c@13860000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + interrupts = <0 0 0>; + }; + + i2c@13870000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + interrupts = <1 1 0>; + }; + + i2c@13880000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + interrupts = <2 2 0>; + }; + + i2c@13890000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + interrupts = <3 3 0>; + }; + + i2c@138a0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + interrupts = <4 4 0>; + }; + + i2c@138b0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + interrupts = <5 5 0>; + }; + + i2c@138c0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + interrupts = <6 6 0>; + }; + + i2c@138d0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + interrupts = <7 7 0>; + }; + + sdhci@12510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,exynos-mmc"; + reg = <0x12510000 0x1000>; + interrupts = <0 75 0>; + }; + + sdhci@12520000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,exynos-mmc"; + reg = <0x12520000 0x1000>; + interrupts = <0 76 0>; + }; + + sdhci@12530000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,exynos-mmc"; + reg = <0x12530000 0x1000>; + interrupts = <0 77 0>; + }; + + sdhci@12540000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,exynos-mmc"; + reg = <0x12540000 0x1000>; + interrupts = <0 78 0>; + }; + + gpio: gpio { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; |