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authorLukasz Majewski2019-04-01 16:00:05 +0200
committerStefano Babic2019-04-02 13:44:18 +0200
commitda60b4301c77fdc0ce16a4f6fb6dc04b69b6282c (patch)
tree2cf5e280f883825ee0f71ca44a376a643241a45d /arch/arm/dts
parent8e2b1f2251b4935f6e1b6619ab7421e0600e259c (diff)
DTS: Fix ETH PHY reset on HSC|DDC boards (imx53)
After the commit: "eth: dm: fec: Add gpio phy reset binding" SHA1: efd0b791069af93e9d439a70d1fe2ae8994dbbfa The FEC ETH driver switched to PHY GPIO reset performed with data defined in DTS. For the HSC|DDC boards the GPIO reset signal is active low and hence the wrong DTS description must be changed (otherwise the reset for ETH is not properly setup). Signed-off-by: Lukasz Majewski <lukma@denx.de>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/imx53-kp.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/imx53-kp.dts b/arch/arm/dts/imx53-kp.dts
index ca98fb59c61..4e1d8af9578 100644
--- a/arch/arm/dts/imx53-kp.dts
+++ b/arch/arm/dts/imx53-kp.dts
@@ -23,7 +23,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eth>;
phy-mode = "rmii";
- phy-reset-gpios = <&gpio7 6 0>;
+ phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};