diff options
| author | Jagan Teki | 2018-05-07 11:21:35 +0530 |
|---|---|---|
| committer | Stefano Babic | 2018-05-18 08:23:43 +0200 |
| commit | dda9892171c3b0433497f1a72bf71db0b79b9c16 (patch) | |
| tree | fb4c40582e24c35d0a522e59c48cb7764174b9af /arch/arm/dts | |
| parent | 1494cc89cbc43847f1c7f5e060942c57a66705e9 (diff) | |
i.MX6DL: mamoj: Add I2C support
i.MX6DL Mamoj has i2c3 and i2c4 buses, add support
through DM_I2C with dt definition.
i2c log:
Reviewed-by: Stefano Babic <sbabic@denx.de>
=======
=> i2c bus
Bus 2: i2c@021a8000
Bus 3: i2c@021f8000
=> i2c dev 2
Setting bus to 2
=> i2c speed 400000
Setting bus speed to 400000 Hz
=> i2c probe
Valid chip addresses: 20 51 53
=> i2c md 53 0xff
00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
=> i2c md 51 0xff
00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53 ..@P.CFRB......S
=> i2c dev 3
Setting bus to 3
=> i2c speed 100000
Setting bus speed to 100000 Hz
=> i2c probe
Valid chip addresses: 08 40 48 4B
=> i2c md 08 0xff
00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/imx6dl-mamoj.dts | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts index 068d518de31..558043445bb 100644 --- a/arch/arm/dts/imx6dl-mamoj.dts +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -21,6 +21,20 @@ status = "okay"; }; +&i2c3 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&i2c4 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; +}; + &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; @@ -60,6 +74,20 @@ >; }; + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 + >; + }; + pinctrl_uart3: uart3grp { fsl,pins = < MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 |