arm: dts: ls1028a: move I2C controller nodes into /soc

While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

12 files changed, 115 insertions, 115 deletions

diff --git a/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
index 4063d9a114d..1f13cf80e6a 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
@@ -16,5 +16,5 @@
 &enetc0 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
index 548ab2ba65b..10375b27516 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
@@ -15,5 +15,5 @@
 &enetc0 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
index 3991fb793ff..f18cb39f219 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
@@ -31,25 +31,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@00}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@00}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@01}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@01}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
index d68c8c2be04..f6561a89eb2 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
@@ -20,13 +20,13 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi b/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
index 94b5081d610..d9ccd8353bb 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
@@ -15,5 +15,5 @@
 &enetc0 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
index 3b850268e6a..0630f120693 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
@@ -45,25 +45,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@1c}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@1c}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
index eb632143e06..170aacf8c01 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
@@ -30,25 +30,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1d}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1d}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
index ed86da6b26d..1a9288a0372 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
@@ -30,25 +30,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@00}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@00}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@01}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@01}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
index c9de4ecc434..544f548b1a9 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
@@ -24,25 +24,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@08}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@08}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@09}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@09}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0a}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0a}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
index 7f785507bf1..639796263cb 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
@@ -20,7 +20,7 @@
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
index 0fbe7721c81..62c5513c2c3 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
@@ -20,7 +20,7 @@
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 54f97014be4..de85fdd045f 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -203,94 +203,6 @@
 		};
 	};
 
-	i2c0: i2c@2000000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2000000 0x0 0x10000>;
-		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c1: i2c@2010000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2010000 0x0 0x10000>;
-		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c2: i2c@2020000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2020000 0x0 0x10000>;
-		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c3: i2c@2030000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2030000 0x0 0x10000>;
-		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c4: i2c@2040000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2040000 0x0 0x10000>;
-		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c5: i2c@2050000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2050000 0x0 0x10000>;
-		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c6: i2c@2060000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2060000 0x0 0x10000>;
-		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c7: i2c@2070000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2070000 0x0 0x10000>;
-		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
 	lpuart0: serial@2260000 {
 		compatible = "fsl,ls1021a-lpuart";
 		reg = <0x0 0x2260000 0x0 0x1000>;
@@ -484,5 +396,93 @@
 			#clock-cells = <2>;
 			clocks = <&sysclk>;
 		};
+
+		i2c0: i2c@2000000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2000000 0x0 0x10000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@2010000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2010000 0x0 0x10000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@2020000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2020000 0x0 0x10000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@2030000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2030000 0x0 0x10000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@2040000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2040000 0x0 0x10000>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c5: i2c@2050000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2050000 0x0 0x10000>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c6: i2c@2060000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2060000 0x0 0x10000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c7: i2c@2070000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2070000 0x0 0x10000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
 	};
 };