diff options
| author | Jernej Skrabec | 2019-08-23 19:24:04 +0200 |
|---|---|---|
| committer | Jagan Teki | 2019-10-25 14:15:49 +0530 |
| commit | e8c19ffa981bc60bdf651658e083664764df1a95 (patch) | |
| tree | c18951b6f104e830a6636aa27936ed46b6f68887 /arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h | |
| parent | 395ec7418695e5ce23f8b48c01a1dbffd2e52d3f (diff) | |
sunxi: H6: DRAM: Add support for half DQ
Half DQ configuration seems to be very rare for H6 based boards/STBs,
but exists nevertheless. Currently the only known product which needs
this support is Tanix TX6 mini.
This commit adds support for half DQ configuration. Code was tested
for regressions on other configurations (OrangePi 3 1 GiB/LPDDR3, Tanix
TX6 4 GiB/DDR3) and none were found.
Thanks to Icenowy Zheng for help with this code.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: thomas graichen <thomas.graichen@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Diffstat (limited to 'arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h')
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h index 0a1da023760..49a8a66f7b1 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h @@ -315,6 +315,7 @@ struct dram_para { u8 cols; u8 rows; u8 ranks; + u8 bus_full_width; const u8 dx_read_delays[NR_OF_BYTE_LANES][RD_LINES_PER_BYTE_LANE]; const u8 dx_write_delays[NR_OF_BYTE_LANES][WR_LINES_PER_BYTE_LANE]; }; |