diff options
| author | Wang Huan | 2014-09-05 13:52:34 +0800 |
|---|---|---|
| committer | York Sun | 2014-09-08 10:30:32 -0700 |
| commit | d60a2099a20254b33a314895a4b5e6a21aebd135 (patch) | |
| tree | 2fb79855edd6466a89c84cc4ce6210802aa75d06 /arch/arm/include/asm/io.h | |
| parent | d6c1ffc7d23f4fe4ae8c91101861055b8e1501b6 (diff) | |
arm: ls102xa: Add Freescale LS102xA SoC support
The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.
Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/io.h')
| -rw-r--r-- | arch/arm/include/asm/io.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 88ecddbc41e..bfbe0a0988b 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -376,7 +376,12 @@ out: return retval; } -#elif !defined(readb) +#else +#define memset_io(a, b, c) memset((void *)(a), (b), (c)) +#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) +#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) + +#if !defined(readb) #define readb(addr) (__readwrite_bug("readb"),0) #define readw(addr) (__readwrite_bug("readw"),0) @@ -389,6 +394,7 @@ out: #define check_signature(io,sig,len) (0) +#endif #endif /* __mem_pci */ /* |