diff options
| author | Ye Li | 2021-10-29 09:46:19 +0800 |
|---|---|---|
| committer | Stefano Babic | 2022-02-05 13:38:38 +0100 |
| commit | 829e06bf41757980a67e6f9bdd1b70189c0c8537 (patch) | |
| tree | ed32822cec0b6e0fd52355e8afd0592f66f67b96 /arch/arm/include | |
| parent | 5ff18da34f915df28f2d20e1d72583d35947e858 (diff) | |
imx8ulp: clock: Add MIPI DSI clock and DCNano clock
Add the DSI clock enable and disable with PCC reset used.
Add the LCD pixel clock calculation and configuration for DCNano
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-imx8ulp/clock.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-imx8ulp/clock.h b/arch/arm/include/asm/arch-imx8ulp/clock.h index 58e3356e32f..24322f3ab20 100644 --- a/arch/arm/include/asm/arch-imx8ulp/clock.h +++ b/arch/arm/include/asm/arch-imx8ulp/clock.h @@ -38,4 +38,6 @@ void init_clk_ddr(void); int set_ddr_clk(u32 phy_freq_mhz); void clock_init(void); void cgc1_enet_stamp_sel(u32 clk_src); +void mxs_set_lcdclk(u32 base_addr, u32 freq_in_khz); +void enable_mipi_dsi_clk(unsigned char enable); #endif |