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authorYe Li2021-10-29 09:46:25 +0800
committerStefano Babic2022-02-05 13:38:39 +0100
commit9c7fbebe5dd5d9daa9160b778432daef2a13f47f (patch)
treeedd9562a582ebb6ea3a1cd4491e4887edd208114 /arch/arm/include
parent112b4cac9d9bd986a5c0e267193dff3e46bab68a (diff)
imx8ulp: Workaround LPOSC_TRIM fuse load issue
8ULP ROM should read the LPOSC trim BIAS fuse to fill the CGC0 LPOSCCTRL[7:0], but it writes a fixed value on A0.1 revision. A0.2 will fix the issue in ROM. But A0.1 we have to workaround it in SPL by setting LPOSCCTRL BIASCURRENT again. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-imx8ulp/sys_proto.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
index 8e2c6ed0cea..284ccafc988 100644
--- a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
@@ -17,4 +17,5 @@ int xrdc_config_pdac(u32 bridge, u32 index, u32 dom, u32 perm);
int xrdc_config_pdac_openacc(u32 bridge, u32 index);
enum boot_device get_boot_device(void);
void set_lpav_qos(void);
+void load_lposc_fuse(void);
#endif