diff options
| author | Peng Fan | 2018-01-10 13:20:29 +0800 |
|---|---|---|
| committer | Stefano Babic | 2018-02-04 12:00:58 +0100 |
| commit | 423e84bc728b4c73bfbdefacb011be59a83797e0 (patch) | |
| tree | 3b80b38ab1b2f2f0fad56e97cf76a298690cd953 /arch/arm/mach-imx/cpu.c | |
| parent | 995e9fef8f190f1861dfe7ebda1f279df94ab201 (diff) | |
imx: cpu: move speed/temp to common cpu
The i.MX7 cpu speed/temp code could be reused on i.MX8M,
so move them to common cpu code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/mach-imx/cpu.c')
| -rw-r--r-- | arch/arm/mach-imx/cpu.c | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index fae8b0a4197..52dbafb50ce 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -333,6 +333,79 @@ void set_chipselect_size(int const cs_size) } #endif +#if defined(CONFIG_MX7) +/* + * OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440) + * defines a 2-bit SPEED_GRADING + */ +#define OCOTP_TESTER3_SPEED_SHIFT 8 +#define OCOTP_TESTER3_SPEED_800MHZ 0 +#define OCOTP_TESTER3_SPEED_500MHZ 1 +#define OCOTP_TESTER3_SPEED_1GHZ 2 +#define OCOTP_TESTER3_SPEED_1P2GHZ 3 + +u32 get_cpu_speed_grade_hz(void) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + uint32_t val; + + val = readl(&fuse->tester3); + val >>= OCOTP_TESTER3_SPEED_SHIFT; + val &= 0x3; + + switch(val) { + case OCOTP_TESTER3_SPEED_800MHZ: + return 800000000; + case OCOTP_TESTER3_SPEED_500MHZ: + return 500000000; + case OCOTP_TESTER3_SPEED_1GHZ: + return 1000000000; + case OCOTP_TESTER3_SPEED_1P2GHZ: + return 1200000000; + } + return 0; +} + +/* + * OCOTP_TESTER3[7:6] (see Fusemap Description Table offset 0x440) + * defines a 2-bit SPEED_GRADING + */ +#define OCOTP_TESTER3_TEMP_SHIFT 6 + +u32 get_cpu_temp_grade(int *minc, int *maxc) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + uint32_t val; + + val = readl(&fuse->tester3); + val >>= OCOTP_TESTER3_TEMP_SHIFT; + val &= 0x3; + + if (minc && maxc) { + if (val == TEMP_AUTOMOTIVE) { + *minc = -40; + *maxc = 125; + } else if (val == TEMP_INDUSTRIAL) { + *minc = -40; + *maxc = 105; + } else if (val == TEMP_EXTCOMMERCIAL) { + *minc = -20; + *maxc = 105; + } else { + *minc = 0; + *maxc = 95; + } + } + return val; +} +#endif + #ifdef CONFIG_NXP_BOARD_REVISION int nxp_board_rev(void) { |