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authorLokesh Vutla2017-12-29 11:47:50 +0530
committerTom Rini2018-01-19 15:49:26 -0500
commit8a8af8a2fd5cbe98b5680ba6822fe38686b6bdb6 (patch)
treee285d86c00c46e571c0ddf27ea570a4b602c6ad1 /arch/arm/mach-keystone
parent5cd9661dc68b40e6c03400dba131b92e71f9e730 (diff)
cmd: ti: Generalize cmd_ddr3 command
Keystone and DRA7 based TI platforms uses same EMIF memory controller. cmd_ddr3 command is customized for keystone platforms, make it generic so that it can be re used for DRA7 platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/mach-keystone')
-rw-r--r--arch/arm/mach-keystone/include/mach/hardware.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index cf6e1762289..5d08418eb9f 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -78,6 +78,7 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_DDR3A_EMIF_CTRL_BASE 0x21010000
#define KS2_DDR3A_EMIF_DATA_BASE 0x80000000
#define KS2_DDR3A_DDRPHYC 0x02329000
+#define EMIF1_BASE KS2_DDR3A_EMIF_CTRL_BASE
#define KS2_DDR3_MIDR_OFFSET 0x00
#define KS2_DDR3_STATUS_OFFSET 0x04