diff options
author | Chris Packham | 2018-12-14 16:27:57 +1300 |
---|---|---|
committer | Stefan Roese | 2018-12-21 08:59:05 +0100 |
commit | 1670a154f5f4845c3dc646fd505cd01083ad6683 (patch) | |
tree | 7f1fbd6afc35f70da27dd1a570920fd9e3bbdef6 /arch/arm/mach-mvebu/cpu.c | |
parent | 76ff3f0a3d31596941fa5bd95173eba808a266a9 (diff) |
ARM: mvebu: remove out of date comment
The Marvell DDR3 training code is now part of the U-Boot SPL so the
comment saying it needs porting is no longer correct.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/mach-mvebu/cpu.c')
-rw-r--r-- | arch/arm/mach-mvebu/cpu.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index aa1be8ebabc..919d05c88c7 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -283,10 +283,8 @@ int print_cpuinfo(void) * and sets the correct windows sizes and base addresses accordingly. * * These values are set in the scratch registers by the Marvell - * DDR3 training code, which is executed by the BootROM before the - * main payload (U-Boot) is executed. This training code is currently - * only available in the Marvell U-Boot version. It needs to be - * ported to mainline U-Boot SPL at some point. + * DDR3 training code, which is executed by the SPL before the + * main payload (U-Boot) is executed. */ static void update_sdram_window_sizes(void) { |