diff options
| author | Masahiro Yamada | 2016-04-21 14:43:18 +0900 |
|---|---|---|
| committer | Masahiro Yamada | 2016-04-24 09:54:08 +0900 |
| commit | 9d0c2ceb35be7016977560a92fc67e3e704e5c9f (patch) | |
| tree | 67f17e8bbc13a293b7d24f7789a3fb0692c1e284 /arch/arm/mach-uniphier/sg-regs.h | |
| parent | 881aa5a79a94a65500959428328f348a18d3d9fe (diff) | |
ARM: uniphier: add PH1-LD20 SoC support
This is the first ARMv8 SoC from Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/sg-regs.h')
| -rw-r--r-- | arch/arm/mach-uniphier/sg-regs.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h index 4044245ee18..1d71ce87ae8 100644 --- a/arch/arm/mach-uniphier/sg-regs.h +++ b/arch/arm/mach-uniphier/sg-regs.h @@ -50,10 +50,11 @@ #define SG_MEMCONF_CH2_SZ_128M ((0x0 << 26) | (0x02 << 16)) #define SG_MEMCONF_CH2_SZ_256M ((0x0 << 26) | (0x03 << 16)) #define SG_MEMCONF_CH2_SZ_512M ((0x1 << 26) | (0x00 << 16)) +#define SG_MEMCONF_CH2_SZ_1G ((0x1 << 26) | (0x01 << 16)) #define SG_MEMCONF_CH2_NUM_MASK (0x1 << 24) #define SG_MEMCONF_CH2_NUM_1 (0x1 << 24) #define SG_MEMCONF_CH2_NUM_2 (0x0 << 24) -/* PH1-LD6b, ProXstream2 only */ +/* PH1-LD6b, ProXstream2, PH1-LD20 only */ #define SG_MEMCONF_CH2_DISABLE (0x1 << 21) #define SG_MEMCONF_SPARSEMEM (0x1 << 4) |