diff options
| author | Hai Pham | 2020-10-27 19:06:51 +0700 |
|---|---|---|
| committer | Marek Vasut | 2021-06-24 20:22:18 +0200 |
| commit | 0beaae223dd55b3f727f07f38b799a1c58612b1b (patch) | |
| tree | 5d660b19433445ec76a10dadff0dee59d5732693 /arch/arm | |
| parent | cdaa69c46eee3c75cca2f72296044d2bd1405343 (diff) | |
ARM: rmobile: Add basic PSCI support for R8A779A0 V3U Falcon
Enable basic PSCI support for R8A779A0 V3U Falcon
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-rmobile/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/mach-rmobile/psci-r8a779a0.c | 49 |
2 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/mach-rmobile/Makefile b/arch/arm/mach-rmobile/Makefile index 81a0dedb41a..195bbeb5c88 100644 --- a/arch/arm/mach-rmobile/Makefile +++ b/arch/arm/mach-rmobile/Makefile @@ -15,6 +15,10 @@ obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o obj-$(CONFIG_RCAR_GEN3) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o obj-$(CONFIG_RZ_G2) += cpu_info-rzg.o +ifneq ($(CONFIG_R8A779A0),) +obj-$(CONFIG_ARMV8_PSCI) += psci-r8a779a0.o +endif + OBJCOPYFLAGS_u-boot-spl.srec := -O srec quiet_cmd_objcopy = OBJCOPY $@ cmd_objcopy = $(OBJCOPY) --gap-fill=0x00 $(OBJCOPYFLAGS) \ diff --git a/arch/arm/mach-rmobile/psci-r8a779a0.c b/arch/arm/mach-rmobile/psci-r8a779a0.c new file mode 100644 index 00000000000..6a85eb22cac --- /dev/null +++ b/arch/arm/mach-rmobile/psci-r8a779a0.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * This file implements basic PSCI support for Renesas r8a779a0 SoC + * + * Copyright (C) 2020 Renesas Electronics Corp. + * + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/psci.h> +#include <asm/secure.h> + +int __secure psci_features(u32 function_id, u32 psci_fid) +{ + switch (psci_fid) { + case ARM_PSCI_0_2_FN_PSCI_VERSION: + case ARM_PSCI_0_2_FN_SYSTEM_RESET: + return 0x0; + } + /* case ARM_PSCI_0_2_FN_CPU_ON: */ + /* case ARM_PSCI_0_2_FN_CPU_OFF: */ + /* case ARM_PSCI_0_2_FN_AFFINITY_INFO: */ + /* case ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE: */ + /* case ARM_PSCI_0_2_FN_SYSTEM_OFF: */ + return ARM_PSCI_RET_NI; +} + +u32 __secure psci_version(void) +{ + return ARM_PSCI_VER_0_2; +} + +#define RST_BASE 0xE6160000 /* Domain0 */ +#define RST_SRESCR0 (RST_BASE + 0x18) +#define RST_SPRES 0x5AA58000 + +void __secure __noreturn psci_system_reset(void) +{ + writel(RST_SPRES, RST_SRESCR0); + + while (1) + ; +} + +int psci_update_dt(void *fdt) +{ + return 0; +} |