diff options
author | Tom Rini | 2023-10-24 09:39:02 -0400 |
---|---|---|
committer | Tom Rini | 2023-10-24 09:39:02 -0400 |
commit | 1b2a3d08c0440db4ee37d748b491673f1db0d384 (patch) | |
tree | 26d2e71946365e53a90b0033dd7cdb8b48ec2c85 /arch/arm | |
parent | 351da15f71e3d70dbc63e90781b403415452d864 (diff) | |
parent | 2f96064d0cf78e21a668ad907d41d63e56f9f7bb (diff) |
Merge tag 'u-boot-imx-20231024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20231024
-------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/18211
- Fixes for MC2432 Eeprom
- i.MX93 ADC
- Secondary boot mode on i.MX8M
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts | 8 | ||||
-rw-r--r-- | arch/arm/dts/imx8mp-dhcom-som.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 20 | ||||
-rw-r--r-- | arch/arm/mach-imx/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/cmd_bmode.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-imx/image-container.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-imx/imx8m/soc.c | 99 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/spl.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-sunxi/board.c | 4 |
9 files changed, 132 insertions, 25 deletions
diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts index 5d9a00c9429..0e5d329b149 100644 --- a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts +++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts @@ -24,6 +24,14 @@ pagesize = <16>; }; +&eeprom0wl { + status = "disabled"; +}; + +&eeprom1wl { + status = "disabled"; +}; + ðphy0f { /* SMSC LAN8740Ai */ pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>; reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/imx8mp-dhcom-som.dtsi b/arch/arm/dts/imx8mp-dhcom-som.dtsi index ea2a567447a..b504d36818b 100644 --- a/arch/arm/dts/imx8mp-dhcom-som.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-som.dtsi @@ -392,6 +392,18 @@ reg = <0x53>; }; + eeprom0wl: eeprom@58 { + compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x50 */ + pagesize = <32>; + reg = <0x58>; + }; + + eeprom1wl: eeprom@5b { + compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x53 */ + pagesize = <32>; + reg = <0x5b>; + }; + ioexp: gpio@74 { compatible = "nxp,pca9539"; reg = <0x74>; diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi index 93b4d91e4c3..a9dffa5a71e 100644 --- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi +++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi @@ -8,6 +8,7 @@ compatible = "wdt-reboot"; wdt = <&wdog3>; bootph-pre-ram; + bootph-some-ram; }; firmware { @@ -30,19 +31,23 @@ &aips2 { bootph-pre-ram; + bootph-some-ram; }; &aips3 { bootph-pre-ram; + bootph-some-ram; }; &iomuxc { bootph-pre-ram; + bootph-some-ram; }; ®_usdhc2_vmmc { u-boot,off-on-delay-us = <20000>; bootph-pre-ram; + bootph-some-ram; }; &pinctrl_reg_usdhc2_vmmc { @@ -51,59 +56,73 @@ &pinctrl_uart1 { bootph-pre-ram; + bootph-some-ram; }; &pinctrl_usdhc2_gpio { bootph-pre-ram; + bootph-some-ram; }; &pinctrl_usdhc2 { bootph-pre-ram; + bootph-some-ram; }; &gpio1 { bootph-pre-ram; + bootph-some-ram; }; &gpio2 { bootph-pre-ram; + bootph-some-ram; }; &gpio3 { bootph-pre-ram; + bootph-some-ram; }; &gpio4 { bootph-pre-ram; + bootph-some-ram; }; &lpuart1 { bootph-pre-ram; + bootph-some-ram; }; &usdhc1 { bootph-pre-ram; + bootph-some-ram; }; &usdhc2 { bootph-pre-ram; + bootph-some-ram; fsl,signal-voltage-switch-extra-delay-ms = <8>; }; &lpi2c2 { bootph-pre-ram; + bootph-some-ram; }; &{/soc@0/bus@44000000/i2c@44350000/pmic@25} { bootph-pre-ram; + bootph-some-ram; }; &{/soc@0/bus@44000000/i2c@44350000/pmic@25/regulators} { bootph-pre-ram; + bootph-some-ram; }; &pinctrl_lpi2c2 { bootph-pre-ram; + bootph-some-ram; }; &fec { @@ -124,6 +143,7 @@ &s4muap { bootph-pre-ram; + bootph-some-ram; status = "okay"; }; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 08ab7069187..abd48d42583 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -71,7 +71,7 @@ config CSF_SIZE config CMD_BMODE bool "Support the 'bmode' command" default y - depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 + depends on ARCH_IMX8M || ARCH_MX7 || ARCH_MX6 || ARCH_MX5 help This enables the 'bmode' (bootmode) command for forcing a boot from specific media. diff --git a/arch/arm/mach-imx/cmd_bmode.c b/arch/arm/mach-imx/cmd_bmode.c index cb317499d54..5b2f4686230 100644 --- a/arch/arm/mach-imx/cmd_bmode.c +++ b/arch/arm/mach-imx/cmd_bmode.c @@ -83,7 +83,11 @@ static int do_boot_mode(struct cmd_tbl *cmdtp, int flag, int argc, reset_requested = 0; } +/* No longer applicable to i.MX8M */ +#if IS_ENABLED(CONFIG_MX53) || IS_ENABLED(CONFIG_MX6) || IS_ENABLED(CONFIG_MX7) boot_mode_apply(p->cfg_val); +#endif + if (reset_requested && p->cfg_val) do_reset(NULL, 0, 0, NULL); return 0; diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c index ebc8021d7cc..c9455fe222a 100644 --- a/arch/arm/mach-imx/image-container.c +++ b/arch/arm/mach-imx/image-container.c @@ -276,8 +276,8 @@ unsigned long spl_spi_get_uboot_offs(struct spi_flash *flash) #endif #ifdef CONFIG_SPL_MMC -unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, - unsigned long raw_sect) +unsigned long arch_spl_mmc_get_uboot_raw_sector(struct mmc *mmc, + unsigned long raw_sect) { int end; diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 5de4d11a761..39802d6a796 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -28,8 +28,10 @@ #include <errno.h> #include <fdt_support.h> #include <fsl_wdog.h> +#include <fuse.h> #include <imx_sip.h> #include <linux/bitops.h> +#include <linux/bitfield.h> DECLARE_GLOBAL_DATA_PTR; @@ -648,19 +650,17 @@ struct rom_api *g_rom_api = (struct rom_api *)0x980; #if defined(CONFIG_IMX8M) #include <spl.h> -int spl_mmc_emmc_boot_partition(struct mmc *mmc) +int imx8m_detect_secondary_image_boot(void) { u32 *rom_log_addr = (u32 *)0x9e0; u32 *rom_log; u8 event_id; - int i, part; - - part = default_spl_mmc_emmc_boot_partition(mmc); + int i, boot_secondary = 0; /* If the ROM event log pointer is not valid. */ if (*rom_log_addr < 0x900000 || *rom_log_addr >= 0xb00000 || *rom_log_addr & 0x3) - return part; + return -EINVAL; /* Parse the ROM event ID version 2 log */ rom_log = (u32 *)(uintptr_t)(*rom_log_addr); @@ -668,7 +668,7 @@ int spl_mmc_emmc_boot_partition(struct mmc *mmc) event_id = rom_log[i] >> 24; switch (event_id) { case 0x00: /* End of list */ - return part; + return boot_secondary; /* Log entries with 1 parameter, skip 1 */ case 0x80: /* Start to perform the device initialization */ case 0x81: /* The boot device initialization completes */ @@ -686,26 +686,89 @@ int spl_mmc_emmc_boot_partition(struct mmc *mmc) continue; /* Boot from the secondary boot image */ case 0x51: - /* - * Swap the eMMC boot partitions in case there was a - * fallback event (i.e. primary image was corrupted - * and that corruption was recognized by the BootROM), - * so the SPL loads the rest of the U-Boot from the - * correct eMMC boot partition, since the BootROM - * leaves the boot partition set to the corrupted one. - */ - if (part == 1) - part = 2; - else if (part == 2) - part = 1; + boot_secondary = 1; continue; default: continue; } } + return boot_secondary; +} + +int spl_mmc_emmc_boot_partition(struct mmc *mmc) +{ + int part, ret; + + part = default_spl_mmc_emmc_boot_partition(mmc); + if (part == 0) + return part; + + ret = imx8m_detect_secondary_image_boot(); + if (ret < 0) { + printf("Could not get boot partition! Using %d\n", part); + return part; + } + + if (ret == 1) { + /* + * Swap the eMMC boot partitions in case there was a + * fallback event (i.e. primary image was corrupted + * and that corruption was recognized by the BootROM), + * so the SPL loads the rest of the U-Boot from the + * correct eMMC boot partition, since the BootROM + * leaves the boot partition set to the corrupted one. + */ + if (part == 1) + part = 2; + else if (part == 2) + part = 1; + } + return part; } + +int boot_mode_getprisec(void) +{ + return !!imx8m_detect_secondary_image_boot(); +} +#endif + +#if defined(CONFIG_IMX8MN) || defined(CONFIG_IMX8MP) +#define IMG_CNTN_SET1_OFFSET GENMASK(22, 19) +unsigned long arch_spl_mmc_get_uboot_raw_sector(struct mmc *mmc, + unsigned long raw_sect) +{ + u32 val, offset; + + if (fuse_read(2, 1, &val)) { + debug("Error reading fuse!\n"); + return raw_sect; + } + + val = FIELD_GET(IMG_CNTN_SET1_OFFSET, val); + if (val > 10) { + debug("Secondary image boot disabled!\n"); + return raw_sect; + } + + if (val == 0) + offset = SZ_4M; + else if (val == 1) + offset = SZ_2M; + else if (val == 2) + offset = SZ_1M; + else /* flash.bin offset = 1 MiB * 2^n */ + offset = SZ_1M << val; + + offset /= 512; + offset -= CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET; + + if (imx8m_detect_secondary_image_boot()) + raw_sect += offset; + + return raw_sect; +} #endif bool is_usb_boot(void) diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 379daa88a4d..eaaa68a8564 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -123,8 +123,8 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) { return IS_SD(mmc) ? MMCSD_MODE_RAW : MMCSD_MODE_EMMCBOOT; } -unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, - unsigned long raw_sect) +unsigned long arch_spl_mmc_get_uboot_raw_sector(struct mmc *mmc, + unsigned long raw_sect) { return IS_SD(mmc) ? 1 : 0; } diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index c2fadf75367..11a49418225 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -338,8 +338,8 @@ uint32_t sunxi_get_spl_size(void) * Also U-Boot proper is located at least 32KB after the SPL, but will * immediately follow the SPL if that is bigger than that. */ -unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, - unsigned long raw_sect) +unsigned long board_spl_mmc_get_uboot_raw_sector(struct mmc *mmc, + unsigned long raw_sect) { unsigned long spl_size = sunxi_get_spl_size(); unsigned long sector; |