diff options
| author | Tang Yuantian | 2016-12-01 17:06:58 +0800 |
|---|---|---|
| committer | York Sun | 2017-01-18 09:29:17 -0800 |
| commit | 435cca167149d19a9740806f63a3f58388280507 (patch) | |
| tree | 4c760f10bfb436d443abfdec7423379a6141c2db /arch/arm | |
| parent | dccef2ec01cdf5403d78223fd60a4ccd761ae6b0 (diff) | |
armv8: fsl-lsch3: enable snoopable sata read and write
By default the SATA IP on the ls208Xa SoCs does not generating
coherent/snoopable transactions. This patch enable it in the
sata axicc register.
Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index c0fd1a616d8..9489f85c642 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -213,10 +213,12 @@ int sata_init(void) ccsr_ahci = (void *)CONFIG_SYS_SATA2; out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); + out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); ccsr_ahci = (void *)CONFIG_SYS_SATA1; out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); + out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); ahci_init((void __iomem *)CONFIG_SYS_SATA1); scsi_scan(0); |