diff options
| author | Gerlando Falauto | 2012-07-20 02:34:25 +0000 |
|---|---|---|
| committer | Prafulla Wadaskar | 2012-10-03 16:43:13 +0530 |
| commit | 455151652524570d7c5b320718c7004e63e01656 (patch) | |
| tree | e7e4b8fc9d5bf69aefa2fa18e62aab2aeee52b05 /arch/arm | |
| parent | cf37c5d98bb2e23fbcbca8a0328ca7dd43d6af8c (diff) | |
kirkwood: implement kw_sdram_bs_set()
Some boards might be equipped with different SDRAM configurations.
When that is the case, CPU CS Window Size Register (CS[0]n Size)
should be set to the biggest value through board.cfg file; then its
value can be fixed at runtime according to the detected SDRAM size.
Therefore, implement kw_sdram_bs_set().
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Marek Vasut <marex@denx.de>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/kirkwood/dram.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c index 1c5faabb455..5e2f9d80ea1 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c @@ -39,6 +39,11 @@ struct kw_sdram_addr_dec { struct kw_sdram_bank sdram_bank[4]; }; +#define KW_REG_CPUCS_WIN_ENABLE (1 << 0) +#define KW_REG_CPUCS_WIN_WR_PROTECT (1 << 1) +#define KW_REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2) +#define KW_REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24) + /* * kw_sdram_bar - reads SDRAM Base Address Register */ @@ -57,6 +62,25 @@ u32 kw_sdram_bar(enum memory_bank bank) } /* + * kw_sdram_bs_set - writes SDRAM Bank size + */ +static void kw_sdram_bs_set(enum memory_bank bank, u32 size) +{ + struct kw_sdram_addr_dec *base = + (struct kw_sdram_addr_dec *)KW_REGISTER(0x1500); + /* Read current register value */ + u32 reg = readl(&base->sdram_bank[bank].win_sz); + + /* Clear window size */ + reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF); + + /* Set new window size */ + reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24); + + writel(reg, &base->sdram_bank[bank].win_sz); +} + +/* * kw_sdram_bs - reads SDRAM Bank size */ u32 kw_sdram_bs(enum memory_bank bank) |