diff options
| author | Manorit Chawdhry | 2023-04-17 12:04:09 +0530 |
|---|---|---|
| committer | Tom Rini | 2023-05-03 09:05:24 -0400 |
| commit | 4b6e3d39cf6a902778692b33a7324f5b5458f690 (patch) | |
| tree | 9470be0bb9ec838f47c7ef385062842d18de288e /arch/arm | |
| parent | 20cbfd680fc87a576bf5ac4c5113c1d89530cf9d (diff) | |
arm: mach-k3: j7200: Fix firewall warnings at boot time
J721E and J7200 have same file j721e_init.c which had the firewall
configs for J721E being applied on J7200 causing the warnings. Split the
firewalls for both the boards to remove those warnings.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-k3/j721e_init.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index 9bba5f79545..0c5d41a77e6 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -25,6 +25,7 @@ #ifdef CONFIG_K3_LOAD_SYSFW struct fwl_data cbass_hc_cfg0_fwls[] = { +#if defined(CONFIG_TARGET_J721E_R5_EVM) { "PCIE0_CFG", 2560, 8 }, { "PCIE1_CFG", 2561, 8 }, { "USB3SS0_CORE", 2568, 4 }, @@ -33,11 +34,16 @@ struct fwl_data cbass_hc_cfg0_fwls[] = { { "UFS_HCI0_CFG", 2580, 4 }, { "SERDES0", 2584, 1 }, { "SERDES1", 2585, 1 }, +#elif defined(CONFIG_TARGET_J7200_R5_EVM) + { "PCIE1_CFG", 2561, 7 }, +#endif }, cbass_hc0_fwls[] = { +#if defined(CONFIG_TARGET_J721E_R5_EVM) { "PCIE0_HP", 2528, 24 }, { "PCIE0_LP", 2529, 24 }, { "PCIE1_HP", 2530, 24 }, { "PCIE1_LP", 2531, 24 }, +#endif }, cbass_rc_cfg0_fwls[] = { { "EMMCSD4SS0_CFG", 2380, 4 }, }, cbass_rc0_fwls[] = { |