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authorTom Rini2015-07-01 15:38:12 -0400
committerTom Rini2015-07-01 15:38:12 -0400
commit891b487098ee2169a16b1bbb354aaef28aa90630 (patch)
treedac06e8de18355c574eaf47fe29d75873ce0fda6 /arch/arm
parent6762ae68887d962e1a4be193672005bdefd3ee32 (diff)
parent8aa5f1d971df0f668144759991e19b5195606a32 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-spi
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/dts/zynq-7000.dtsi26
-rw-r--r--arch/arm/dts/zynq-zc770-xm010.dts5
3 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 08292353336..192d9cf3f07 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -670,7 +670,11 @@ config ARCH_ZYNQ
bool "Xilinx Zynq Platform"
select CPU_V7
select SUPPORT_SPL
+ select OF_CONTROL
+ select SPL_DISABLE_OF_CONTROL
select DM
+ select DM_SPI
+ select DM_SPI_FLASH
config TARGET_XILINX_ZYNQMP
bool "Support Xilinx ZynqMP Platform"
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 2d076f194e0..920715989e9 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -109,6 +109,32 @@
interrupts = <0 50 4>;
};
+ spi0: spi@e0006000 {
+ compatible = "xlnx,zynq-spi";
+ reg = <0xe0006000 0x1000>;
+ status = "disabled";
+ interrupt-parent = <&intc>;
+ interrupts = <0 26 4>;
+ clocks = <&clkc 25>, <&clkc 34>;
+ clock-names = "ref_clk", "pclk";
+ spi-max-frequency = <166666700>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi1: spi@e0007000 {
+ compatible = "xlnx,zynq-spi";
+ reg = <0xe0007000 0x1000>;
+ status = "disabled";
+ interrupt-parent = <&intc>;
+ interrupts = <0 49 4>;
+ clocks = <&clkc 26>, <&clkc 35>;
+ clock-names = "ref_clk", "pclk";
+ spi-max-frequency = <166666700>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
gem0: ethernet@e000b000 {
compatible = "cdns,gem";
reg = <0xe000b000 0x4000>;
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts
index 5e661749772..bf107e308a6 100644
--- a/arch/arm/dts/zynq-zc770-xm010.dts
+++ b/arch/arm/dts/zynq-zc770-xm010.dts
@@ -14,6 +14,7 @@
aliases {
serial0 = &uart1;
+ spi1 = &spi1;
};
memory {
@@ -21,3 +22,7 @@
reg = <0 0x40000000>;
};
};
+
+&spi1 {
+ status = "okay";
+};