diff options
| author | Scott Wood | 2015-04-17 09:19:01 -0500 |
|---|---|---|
| committer | Tom Rini | 2015-04-18 16:54:29 -0400 |
| commit | 9efaca3e847696ed40fca1dbbc621fcc35b8d94c (patch) | |
| tree | 2d97706c0a7393f5c716cecb46c1869131a507bd /arch/arm | |
| parent | 3907305fb97c4547af5a03a0107b013ed7e886ca (diff) | |
ahci: mmio_base is a virtual address
Don't store it in a u32.
Don't dereference the bus address as if it were a virtual address
(fixes 284231e49a2b4 ("ahci: Support splitting of read transactions
into multiple chunks")).
Fixes crash on boot in MPC8641HPCN_36BIT target.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Vadim Bendebury <vbendeb@chromium.org>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv7/omap-common/boot-common.c | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap-common/sata.c | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c index 17500f2315e..f2f6897eb64 100644 --- a/arch/arm/cpu/armv7/omap-common/boot-common.c +++ b/arch/arm/cpu/armv7/omap-common/boot-common.c @@ -159,6 +159,6 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) #ifdef CONFIG_SCSI_AHCI_PLAT void arch_preboot_os(void) { - ahci_reset(DWC_AHSATA_BASE); + ahci_reset((void __iomem *)DWC_AHSATA_BASE); } #endif diff --git a/arch/arm/cpu/armv7/omap-common/sata.c b/arch/arm/cpu/armv7/omap-common/sata.c index d18bc50c5ab..2c2d1bce363 100644 --- a/arch/arm/cpu/armv7/omap-common/sata.c +++ b/arch/arm/cpu/armv7/omap-common/sata.c @@ -69,7 +69,7 @@ int init_sata(int dev) val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO; writel(val, TI_SATA_WRAPPER_BASE + TI_SATA_SYSCONFIG); - ret = ahci_init(DWC_AHSATA_BASE); + ret = ahci_init((void __iomem *)DWC_AHSATA_BASE); return ret; } @@ -88,6 +88,6 @@ void scsi_init(void) void scsi_bus_reset(void) { - ahci_reset(DWC_AHSATA_BASE); - ahci_init(DWC_AHSATA_BASE); + ahci_reset((void __iomem *)DWC_AHSATA_BASE); + ahci_init((void __iomem *)DWC_AHSATA_BASE); } |