diff options
| author | Yuantian Tang | 2022-03-09 15:37:22 +0800 |
|---|---|---|
| committer | Priyanka Jain | 2022-04-26 17:13:57 +0530 |
| commit | aaaa1be8f043ff9412f9c35c62a05bcf218eda34 (patch) | |
| tree | bdf59484babbd725b12230c7c3e8cf324a82c825 /arch/arm | |
| parent | 20759b2973e77d86ffea11a7eff3fccbc0e37dd9 (diff) | |
armv8: layerscape: fix the function mismatch issue
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 2fb4e404a24..87410c73a92 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2014-2015 Freescale Semiconductor - * Copyright 2019 NXP + * Copyright 2019-2022 NXP * * Extracted from armv8/start.S */ @@ -344,7 +344,7 @@ ENTRY(fsl_ocram_clear_ecc_err) ldr x0, =DCSR_DCFG_MBEESR2 str w1, [x0] ret -ENDPROC(fsl_ocram_init) +ENDPROC(fsl_ocram_clear_ecc_err) #endif #ifdef CONFIG_FSL_LSCH3 |