diff options
| author | Masahiro Yamada | 2016-01-17 10:13:16 +0900 |
|---|---|---|
| committer | Masahiro Yamada | 2016-01-20 08:39:42 +0900 |
| commit | cefca48ca7f1c46bf2e3a64a40fa0c1aaf575a42 (patch) | |
| tree | 8c67c5310d55c4a2f5aa53914c73e85b8720b64f /arch/arm | |
| parent | 25d4eb8091f4c410987c139161d3621e0fb1fbca (diff) | |
ARM: uniphier: refactor outer cache operation slightly
Improve readability without changing the behavior.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-uniphier/cache_uniphier.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c index b4ca8b69341..4a79966659c 100644 --- a/arch/arm/mach-uniphier/cache_uniphier.c +++ b/arch/arm/mach-uniphier/cache_uniphier.c @@ -67,7 +67,9 @@ static void uniphier_cache_maint_range(u32 start, u32 end, u32 operation) */ start = start & ~(SSC_LINE_SIZE - 1); - if (start == 0 && end >= (u32)(-SSC_LINE_SIZE)) { + size = end - start; + + if (unlikely(size >= (u32)(-SSC_LINE_SIZE))) { /* this means cache operation for all range */ uniphier_cache_maint_all(operation); return; @@ -77,7 +79,7 @@ static void uniphier_cache_maint_range(u32 start, u32 end, u32 operation) * If end address is not aligned to cache-line, * do cache operation for the last cache-line */ - size = (end - start + SSC_LINE_SIZE - 1) & ~(SSC_LINE_SIZE - 1); + size = ALIGN(size, SSC_LINE_SIZE); while (size) { u32 chunk_size = size > SSC_RANGE_OP_MAX_SIZE ? |