diff options
| author | Biwen Li | 2021-02-05 19:01:53 +0800 |
|---|---|---|
| committer | Priyanka Jain | 2021-02-08 14:01:20 +0530 |
| commit | d62cbea84aed7c5d79dad00d2dbf90897253887f (patch) | |
| tree | 54cd51500b06e8568ac70f55605d50217a0f7723 /arch/arm | |
| parent | b7ddedfab543d096a4c1df36967a67bb6e20816e (diff) | |
arm64: dts: ls1088a: add gpio node
Add gpio node for SoC LS1088A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/fsl-ls1088a.dtsi | 47 |
1 files changed, 46 insertions, 1 deletions
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi index 7b4ac6d3ded..64caa600ad7 100644 --- a/arch/arm/dts/fsl-ls1088a.dtsi +++ b/arch/arm/dts/fsl-ls1088a.dtsi @@ -2,9 +2,10 @@ /* * NXP ls1088a SOC common device tree source * - * Copyright 2017, 2020 NXP + * Copyright 2017, 2020-2021 NXP */ +#include <dt-bindings/interrupt-controller/arm-gic.h> / { compatible = "fsl,ls1088a"; interrupt-parent = <&gic>; @@ -115,6 +116,50 @@ bus-width = <4>; }; + gpio0: gpio@2300000 { + compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; + reg = <0x0 0x2300000 0x0 0x10000>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + little-endian; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio@2310000 { + compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; + reg = <0x0 0x2310000 0x0 0x10000>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + little-endian; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@2320000 { + compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; + reg = <0x0 0x2320000 0x0 0x10000>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + little-endian; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio3: gpio@2330000 { + compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; + reg = <0x0 0x2330000 0x0 0x10000>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + little-endian; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + ifc: ifc@1530000 { compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x2240000 0x0 0x20000>; |