Merge tag 'xilinx-for-v2018.07-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx fixes for v2018.07-rc2

Zynq:
- Fix missing watchdog header
- DT fixes

ZynqMP:
- emmc configuration split
- Enable SPD
- Fix PMUFW_INIT_FILE logic
- Coverity fixes in SoC code

timer
- Add timer_get_boot_us

mmc:
- Fix MMC HS200 tuning command

serial:
- Fix scrabled chars with OF_LIVE

10 files changed, 80 insertions, 28 deletions

diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c
index e122be59c74..1279dc8658a 100644
--- a/arch/arm/cpu/armv8/zynqmp/cpu.c
+++ b/arch/arm/cpu/armv8/zynqmp/cpu.c
@@ -212,8 +212,12 @@ static int zynqmp_mmio_rawwrite(const u32 address,
 {
 	u32 data;
 	u32 value_local = value;
+	int ret;
+
+	ret = zynqmp_mmio_read(address, &data);
+	if (ret)
+		return ret;
 
-	zynqmp_mmio_read(address, &data);
 	data &= ~mask;
 	value_local &= mask;
 	value_local |= data;
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 078c21b4010..493652ea8c4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -147,7 +147,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
 	zynq-zturn.dtb \
 	zynq-zybo.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += \
-	zynqmp-mini-emmc.dtb			\
+	zynqmp-mini-emmc0.dtb			\
+	zynqmp-mini-emmc1.dtb			\
 	zynqmp-mini-nand.dtb			\
 	zynqmp-zcu100-revC.dtb			\
 	zynqmp-zcu102-revA.dtb			\
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts
index bb224662bb7..12e35618f87 100644
--- a/arch/arm/dts/zynq-zc702.dts
+++ b/arch/arm/dts/zynq-zc702.dts
@@ -30,8 +30,6 @@
 
 	gpio-keys {
 		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		autorepeat;
 		sw14 {
 			label = "sw14";
diff --git a/arch/arm/dts/zynq-zturn.dts b/arch/arm/dts/zynq-zturn.dts
index 8aa384b59b7..cc41efcb463 100644
--- a/arch/arm/dts/zynq-zturn.dts
+++ b/arch/arm/dts/zynq-zturn.dts
@@ -49,8 +49,6 @@
 
 	gpio-keys {
 		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		autorepeat;
 		K1 {
 			label = "K1";
diff --git a/arch/arm/dts/zynqmp-mini-emmc.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts
index e5b3c5fc78c..24dd1ab9df0 100644
--- a/arch/arm/dts/zynqmp-mini-emmc.dts
+++ b/arch/arm/dts/zynqmp-mini-emmc0.dts
@@ -18,7 +18,6 @@
 	aliases {
 		serial0 = &dcc;
 		mmc0 = &sdhci0;
-		mmc1 = &sdhci1;
 	};
 
 	chosen {
@@ -36,6 +35,12 @@
 		u-boot,dm-pre-reloc;
 	};
 
+	clk_xin: clk_xin {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <200000000>;
+	};
+
 	amba: amba {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -50,15 +55,6 @@
 			clock-names = "clk_xin", "clk_ahb";
 			xlnx,device_id = <0>;
 		};
-
-		sdhci1: sdhci@ff170000 {
-			u-boot,dm-pre-reloc;
-			compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
-			status = "disabled";
-			reg = <0x0 0xff170000 0x0 0x1000>;
-			clock-names = "clk_xin", "clk_ahb";
-			xlnx,device_id = <1>;
-		};
 	};
 };
 
@@ -69,7 +65,3 @@
 &sdhci0 {
 	status = "okay";
 };
-
-&sdhci1 {
-	status = "okay";
-};
diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts
new file mode 100644
index 00000000000..d1549b6dc6d
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-emmc1.dts
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Xilinx ZynqMP Mini Configuration
+ *
+ * (C) Copyright 2018, Xilinx, Inc.
+ *
+ * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
+ */
+
+/dts-v1/;
+
+/ {
+	model = "ZynqMP MINI EMMC";
+	compatible = "xlnx,zynqmp";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &dcc;
+		mmc0 = &sdhci1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x20000000>;
+	};
+
+	dcc: dcc {
+		compatible = "arm,dcc";
+		status = "disabled";
+		u-boot,dm-pre-reloc;
+	};
+
+	clk_xin: clk_xin {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <200000000>;
+	};
+
+	amba: amba {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		sdhci1: sdhci@ff170000 {
+			u-boot,dm-pre-reloc;
+			compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
+			status = "disabled";
+			reg = <0x0 0xff170000 0x0 0x1000>;
+			clock-names = "clk_xin", "clk_xin";
+			xlnx,device_id = <1>;
+		};
+	};
+};
+
+&dcc {
+	status = "okay";
+};
+
+&sdhci1 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts
index c6aaa08a004..6e575a063be 100644
--- a/arch/arm/dts/zynqmp-zcu100-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu100-revC.dts
@@ -48,8 +48,6 @@
 
 	gpio-keys {
 		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		autorepeat;
 		sw4 {
 			label = "sw4";
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index b7c638bc9e5..ddc3fbae1f6 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -45,8 +45,6 @@
 
 	gpio-keys {
 		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		autorepeat;
 		sw19 {
 			label = "sw19";
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index bbcd26031de..a30268b7b11 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -45,8 +45,6 @@
 
 	gpio-keys {
 		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		autorepeat;
 		sw19 {
 			label = "sw19";
diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index aa9055b7152..6c1a0f7a3b3 100644
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -45,8 +45,6 @@
 
 	gpio-keys {
 		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		autorepeat;
 		sw19 {
 			label = "sw19";