aboutsummaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
authorPeng Fan2019-09-16 03:09:20 +0000
committerStefano Babic2019-11-05 10:27:18 +0100
commitdeca6cfbf5d7f52d4a86e24afc1a808ec673ddcf (patch)
tree08497adf417efb8b5bb8bfb4b368aa9025143943 /arch/arm
parentf4c36ab6eeadc09df435767c0cb1ca30cf89b7f7 (diff)
imx8mn: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 82fa7aea131..e2c1c1315f2 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -56,7 +56,7 @@ void enable_tzc380(void)
/* Enable TZASC and lock setting */
setbits_le32(&gpr->gpr[10], GPR_TZASC_EN);
setbits_le32(&gpr->gpr[10], GPR_TZASC_EN_LOCK);
- if (IS_ENABLED(CONFIG_IMX8MM))
+ if (is_imx8mm() || is_imx8mn())
setbits_le32(&gpr->gpr[10], BIT(1));
/*
* set Region 0 attribute to allow secure and non-secure