diff options
| author | Ovidiu Panait | 2022-05-31 21:14:32 +0300 |
|---|---|---|
| committer | Michal Simek | 2022-06-24 14:16:00 +0200 |
| commit | 10f6508c0728c1a125bead212259b2921702d1b7 (patch) | |
| tree | fa775195eed0601d262e2ef86f7082facf2cfdc6 /arch/microblaze | |
| parent | 95b7a8fd128aec8214d13b33131a4ea1fa4cc9a3 (diff) | |
microblaze: cache: introduce flush_dcache_range()
Align microblaze with the other architectures and provide an
implementation for flush_dcache_range(). Also, remove the microblaze
exception in drivers/core/device.c.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-11-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'arch/microblaze')
| -rw-r--r-- | arch/microblaze/cpu/cache.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index cd8507901d4..829e6c7ae60 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -49,6 +49,17 @@ static void __flush_dcache(ulong addr, ulong size) } } +void flush_dcache_range(unsigned long start, unsigned long end) +{ + if (start >= end) { + debug("Invalid dcache range - start: 0x%08lx end: 0x%08lx\n", + start, end); + return; + } + + __flush_dcache(start, end - start); +} + void flush_dcache_all(void) { __flush_dcache(0, gd_cpuinfo()->dcache_size); |