diff options
| author | Tom Rini | 2021-08-26 11:47:59 -0400 |
|---|---|---|
| committer | Tom Rini | 2021-08-31 17:47:49 -0400 |
| commit | ab92b38a0161f0d8efa1c2112d944ef8f755dfbe (patch) | |
| tree | f4413fb22813b940ce12ca5079c67c7149ade8e3 /arch/mips/Kconfig | |
| parent | e4ddf14305b28e788e09a9b1b5b2b2474234eb91 (diff) | |
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 26 |
1 files changed, 3 insertions, 23 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 6b1f10d9a0e..fa221f1d042 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -22,7 +22,7 @@ config TARGET_MALTA select DYNAMIC_IO_PORT_BASE select MIPS_CM select MIPS_INSERT_BOOT_CONFIG - select MIPS_L1_CACHE_SHIFT_6 + select SYS_CACHE_SHIFT_6 select MIPS_L2_CACHE select OF_CONTROL select OF_ISA_BUS @@ -132,7 +132,7 @@ config TARGET_BOSTON select DM select DM_SERIAL select MIPS_CM - select MIPS_L1_CACHE_SHIFT_6 + select SYS_CACHE_SHIFT_6 select MIPS_L2_CACHE select OF_BOARD_SETUP select OF_CONTROL @@ -153,7 +153,7 @@ config TARGET_XILFPGA select DM_ETH select DM_GPIO select DM_SERIAL - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select OF_CONTROL select ROM_EXCEPTION_VECTORS select SUPPORTS_CPU_MIPS32_R1 @@ -566,26 +566,6 @@ config SYS_CACHE_SIZE_AUTO so if you know the cache configuration for your system at compile time it would be beneficial to configure it. -config MIPS_L1_CACHE_SHIFT_4 - bool - -config MIPS_L1_CACHE_SHIFT_5 - bool - -config MIPS_L1_CACHE_SHIFT_6 - bool - -config MIPS_L1_CACHE_SHIFT_7 - bool - -config MIPS_L1_CACHE_SHIFT - int - default "7" if MIPS_L1_CACHE_SHIFT_7 - default "6" if MIPS_L1_CACHE_SHIFT_6 - default "5" if MIPS_L1_CACHE_SHIFT_5 - default "4" if MIPS_L1_CACHE_SHIFT_4 - default "5" - config MIPS_L2_CACHE bool help |