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authorShiji Yang2023-08-03 09:47:17 +0800
committerTom Rini2023-08-09 09:21:42 -0400
commitccea96f443e2d35cf5ecc341bb14569029eb93b8 (patch)
treed5940392747a93bf244739ddc337fdec9ce98a34 /arch/mips
parent506df9dc5881b74ca6463b89e9edcd14732a7da5 (diff)
treewide: unify the linker symbol reference format
Now all linker symbols are declared as type char[]. Though we can reference the address via both the array name 'var' and its address '&var'. It's better to unify them to avoid confusing developers. This patch converts all '&var' linker symbol refrences to the most commonly used format 'var'. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/lib/reloc.c2
-rw-r--r--arch/mips/mach-jz47xx/jz4780/jz4780.c2
-rw-r--r--arch/mips/mach-mtmips/mt7621/spl/launch.c2
-rw-r--r--arch/mips/mach-mtmips/mt7621/spl/spl.c2
4 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
index 67c8af2f35a..9cf6809f406 100644
--- a/arch/mips/lib/reloc.c
+++ b/arch/mips/lib/reloc.c
@@ -146,7 +146,7 @@ void relocate_code(ulong start_addr_sp, gd_t *new_gd, ulong relocaddr)
/* Clear the .bss section */
bss_start = (uint8_t *)((unsigned long)__bss_start + off);
- bss_len = (unsigned long)&__bss_end - (unsigned long)__bss_start;
+ bss_len = (unsigned long)__bss_end - (unsigned long)__bss_start;
memset(bss_start, 0, bss_len);
/* Jump to the relocated U-Boot */
diff --git a/arch/mips/mach-jz47xx/jz4780/jz4780.c b/arch/mips/mach-jz47xx/jz4780/jz4780.c
index 15d1eff2ba7..4584368ce81 100644
--- a/arch/mips/mach-jz47xx/jz4780/jz4780.c
+++ b/arch/mips/mach-jz47xx/jz4780/jz4780.c
@@ -42,7 +42,7 @@ void board_init_f(ulong dummy)
enable_caches();
/* Clear the BSS */
- memset(__bss_start, 0, (char *)&__bss_end - __bss_start);
+ memset(__bss_start, 0, (size_t)__bss_end - (size_t)__bss_start);
gd->flags |= GD_FLG_SPL_INIT;
diff --git a/arch/mips/mach-mtmips/mt7621/spl/launch.c b/arch/mips/mach-mtmips/mt7621/spl/launch.c
index 37c20a5f564..95dd65913d4 100644
--- a/arch/mips/mach-mtmips/mt7621/spl/launch.c
+++ b/arch/mips/mach-mtmips/mt7621/spl/launch.c
@@ -70,7 +70,7 @@ void secondary_cpu_init(void)
cpumask = 0x0f;
/* Make BootROM/TPL redirect Core1's bootup flow to our entry point */
- writel((uintptr_t)&_start, sysc + BOOT_SRAM_BASE_REG);
+ writel((uintptr_t)_start, sysc + BOOT_SRAM_BASE_REG);
bootup_secondary_core();
}
diff --git a/arch/mips/mach-mtmips/mt7621/spl/spl.c b/arch/mips/mach-mtmips/mt7621/spl/spl.c
index aa5b267bb96..25b409e2417 100644
--- a/arch/mips/mach-mtmips/mt7621/spl/spl.c
+++ b/arch/mips/mach-mtmips/mt7621/spl/spl.c
@@ -86,7 +86,7 @@ unsigned long spl_nor_get_uboot_base(void)
uint32_t spl_nand_get_uboot_raw_page(void)
{
- const struct stage_header *sh = (const struct stage_header *)&_start;
+ const struct stage_header *sh = (const struct stage_header *)_start;
u32 addr;
addr = image_get_header_size() + be32_to_cpu(sh->stage_size);