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authorTom Rini2022-10-28 20:27:13 -0400
committerTom Rini2022-11-10 10:08:55 -0500
commit6cc04547cb3bbd3a3d78947f200acbae19e3c67f (patch)
tree518a634e223bfb02d08ca359331a4ec08c20513c /arch/powerpc/cpu/mpc85xx/cpu.c
parent5155207ae1a0797a99c0a5f4e99741960ff04697 (diff)
global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cpu.c')
-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 432d4b11dcf..49a1aac42b5 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -98,7 +98,7 @@ int checkcpu (void)
#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
if (SVR_SOC_VER(svr) == SVR_T4080) {
ccsr_rcpm_t *rcpm =
- (void __iomem *)(CONFIG_SYS_FSL_CORENET_RCPM_ADDR);
+ (void __iomem *)(CFG_SYS_FSL_CORENET_RCPM_ADDR);
setbits_be32(&gur->devdisr2, FSL_CORENET_DEVDISR2_DTSEC1_6 ||
FSL_CORENET_DEVDISR2_DTSEC1_9);
@@ -540,16 +540,16 @@ static void dump_spd_ddr_reg(void)
for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
switch (i) {
case 0:
- ddr[i] = (void *)CONFIG_SYS_FSL_DDR_ADDR;
+ ddr[i] = (void *)CFG_SYS_FSL_DDR_ADDR;
break;
-#if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1)
+#if defined(CFG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1)
case 1:
- ddr[i] = (void *)CONFIG_SYS_FSL_DDR2_ADDR;
+ ddr[i] = (void *)CFG_SYS_FSL_DDR2_ADDR;
break;
#endif
-#if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2)
+#if defined(CFG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2)
case 2:
- ddr[i] = (void *)CONFIG_SYS_FSL_DDR3_ADDR;
+ ddr[i] = (void *)CFG_SYS_FSL_DDR3_ADDR;
break;
#endif
#if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 3)