diff options
| author | Christophe Leroy | 2017-07-06 10:33:17 +0200 |
|---|---|---|
| committer | Tom Rini | 2017-07-08 15:55:34 -0400 |
| commit | 70fd071001eafa60ed2ac8a69cfc5600c59981a5 (patch) | |
| tree | 0b66d6b94eb627bc5d78a25a6b2441ee31e976f3 /arch/powerpc/cpu/mpc8xx/speed.c | |
| parent | 73bc94c6b7f73c2d22f43daaebfe5ddcb0948ee7 (diff) | |
powerpc, 8xx: Handle checkpatch errors and some of the warnings/checks
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xx/speed.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xx/speed.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c index c91427e9040..8d43efff6ca 100644 --- a/arch/powerpc/cpu/mpc8xx/speed.c +++ b/arch/powerpc/cpu/mpc8xx/speed.c @@ -16,29 +16,29 @@ void get_brgclk(uint sccr) { uint divider = 0; - switch((sccr&SCCR_DFBRG11)>>11){ - case 0: - divider = 1; - break; - case 1: - divider = 4; - break; - case 2: - divider = 16; - break; - case 3: - divider = 64; - break; + switch ((sccr & SCCR_DFBRG11) >> 11) { + case 0: + divider = 1; + break; + case 1: + divider = 4; + break; + case 2: + divider = 16; + break; + case 3: + divider = 64; + break; } - gd->arch.brg_clk = gd->cpu_clk/divider; + gd->arch.brg_clk = gd->cpu_clk / divider; } /* * get_clocks() fills in gd->cpu_clock depending on CONFIG_8xx_GCLK_FREQ */ -int get_clocks (void) +int get_clocks(void) { - uint immr = get_immr (0); /* Return full IMMR contents */ + uint immr = get_immr(0); /* Return full IMMR contents */ immap_t __iomem *immap = (immap_t __iomem *)(immr & 0xFFFF0000); uint sccr = in_be32(&immap->im_clkrst.car_sccr); /* @@ -59,5 +59,5 @@ int get_clocks (void) get_brgclk(sccr); - return (0); + return 0; } |