diff options
| author | Tom Rini | 2023-01-10 11:19:42 -0500 |
|---|---|---|
| committer | Tom Rini | 2023-01-20 12:27:23 -0500 |
| commit | a84fa1bef4382b30de0e8b57997075aabe6f583a (patch) | |
| tree | 3c3b498463bb2acb07773e775618066865bd61b1 /arch/powerpc/cpu | |
| parent | 89c90cadf371cafe06ce99b80c0334043fabf5cd (diff) | |
nxp: Finish migration of SYS_FSL_SRDS_[12] to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
listed in arch/Kconfig.nxp and match how they're currently used by
select'ing them under the required PowerPC ARCH_xxx options.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/powerpc/cpu')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 2c54a9e2120..e813bf094d1 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -313,6 +313,8 @@ config ARCH_B4860 select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_FSL_SRDS_1 + select SYS_FSL_SRDS_2 select SYS_FSL_SRIO_LIODN select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN select SYS_FSL_USB1_PHY_ENABLE @@ -780,6 +782,7 @@ config ARCH_T1024 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SINGLE_SOURCE_CLK + select SYS_FSL_SRDS_1 select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN select SYS_FSL_USB_DUAL_PHY_ENABLE select FSL_IFC @@ -813,6 +816,7 @@ config ARCH_T1040 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SINGLE_SOURCE_CLK + select SYS_FSL_SRDS_1 select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN select SYS_FSL_USB_DUAL_PHY_ENABLE select FSL_IFC @@ -845,6 +849,7 @@ config ARCH_T1042 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SINGLE_SOURCE_CLK + select SYS_FSL_SRDS_1 select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN select SYS_FSL_USB_DUAL_PHY_ENABLE select FSL_IFC @@ -880,6 +885,8 @@ config ARCH_T2080 select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v30 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_FSL_SRDS_1 + select SYS_FSL_SRDS_2 select SYS_FSL_SRIO_LIODN select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN select SYS_FSL_USB_DUAL_PHY_ENABLE @@ -921,6 +928,8 @@ config ARCH_T4240 select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v30 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_FSL_SRDS_1 + select SYS_FSL_SRDS_2 select SYS_FSL_SRIO_LIODN select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN select SYS_FSL_USB_DUAL_PHY_ENABLE @@ -1198,9 +1207,6 @@ config SYS_FSL_ERRATUM_SRIO_A004034 config SYS_FSL_ERRATUM_USB14 bool -config SYS_HAS_SERDES - bool - config SYS_P4080_ERRATUM_CPU22 bool |