diff options
| author | Hou Zhiqiang | 2020-09-21 15:16:23 +0530 |
|---|---|---|
| committer | Tom Rini | 2020-09-24 08:27:44 -0400 |
| commit | 613e49bb91a4d367e64b6c644dd7e5a9e49f3063 (patch) | |
| tree | f618aad4d8fef4e250620a361ccb6d0bf9ac55bf /arch/powerpc/dts/pq3-etsec1-2.dtsi | |
| parent | 1e944259f5b655c736482b63c1b786e1add0f2be (diff) | |
dts: powerpc: p2020rdb: Add eTSEC DT nodes
P2020RDB implements 3 enhanced three-speed Ethernet controllers,
and the connection is shown below:
eTSEC1: Connected to RGMII switch VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/powerpc/dts/pq3-etsec1-2.dtsi')
| -rw-r--r-- | arch/powerpc/dts/pq3-etsec1-2.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/powerpc/dts/pq3-etsec1-2.dtsi b/arch/powerpc/dts/pq3-etsec1-2.dtsi new file mode 100644 index 00000000000..d45865fe03a --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-2.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC device tree stub [ @ offsets 0x26000 ] + * + * Copyright 2011-2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ethernet@26000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <2>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x26000 0x1000>; + ranges = <0x0 0x26000 0x1000>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; +}; + +mdio@26520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x26520 0x20>; +}; |